Verilator-based Fast Verification Methodology for BLE MAC Hardware

Eunkyung Ham, Yujin Jeon, Jaeyun Lim, Ji Hoon Kim

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Following the market trend, fast and strict verification of hardware architecture is essential for saving cost and time of production. Recently, Verilator, an open-source Verilog simulator, is widely used due to its fast simulation time as well as easy-to-use property. In this paper, we present a fast verification methodology for BLE (Bluetooth Low Energy) MAC (Medium Access Control) hardware based on Verilator. Since C++-based modeling can be easily integrated into the Verilog-based hardware platform with Verilator, complex verification scenarios with various parameter configurations can be supported. Compared to the commercial Verilog simulator, our verification platform shows up to 5.94 times of improvement in terms of simulation time.

Original languageEnglish
Title of host publication2023 International Conference on Electronics, Information, and Communication, ICEIC 2023
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350320213
DOIs
StatePublished - 2023
Event2023 International Conference on Electronics, Information, and Communication, ICEIC 2023 - Singapore, Singapore
Duration: 5 Feb 20238 Feb 2023

Publication series

Name2023 International Conference on Electronics, Information, and Communication, ICEIC 2023

Conference

Conference2023 International Conference on Electronics, Information, and Communication, ICEIC 2023
Country/TerritorySingapore
CitySingapore
Period5/02/238/02/23

Bibliographical note

Publisher Copyright:
© 2023 IEEE.

Keywords

  • Hardware design
  • Verification Methodology
  • Verilator

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