Uniformity Improvement of SiNx-Based Resistive Switching Memory by Suppressed Internal Overshoot Current

Min Hwi Kim; Sungjun Kim; Suhyun Bang; Tae Hyeon Kim; Dong Keun Lee; Seongjae Cho; Byung Gook Park

doi:10.1109/TNANO.2018.2842071

Uniformity Improvement of SiN_x-Based Resistive Switching Memory by Suppressed Internal Overshoot Current

Min Hwi Kim, Sungjun Kim, Suhyun Bang, Tae Hyeon Kim, Dong Keun Lee, Seongjae Cho, Byung Gook Park

Electronic and Electrical Engineering

Research output: Contribution to journal › Article › peer-review

23 Scopus citations

Abstract

In this paper, we have investigated the effect of additional thin SiO₂ layer on switching variability of SiN_x-based resistive memory (RRAM). We found that excessive LRS state generated in set operation results in large reset current and abrupt reset operation. The abrupt reset operation leads to large distribution of HRS. To investigate the transient characteristics of switching procedure in detail, measurement environment was implemented with equivalent circuit, and measured current from equipment was separated into capacitive and resistive current of resistive memory cell. Consequently, we point the internal overshoot current occurring in set operation as the cause of the excessive leaky state leading to large resistance distributions. Finally, we confirm the effect of low resistance state value (R_LRS) and cell capacitance (C_DUT) on the internal overshoot current of RRAM.

Original language	English
Pages (from-to)	824-828
Number of pages	5
Journal	IEEE Transactions on Nanotechnology
Volume	17
Issue number	4
DOIs	https://doi.org/10.1109/TNANO.2018.2842071
State	Published - Jul 2018

Bibliographical note

Funding Information:
Manuscript received April 18, 2018; accepted May 24, 2018. Date of publication May 30, 2018; date of current version July 9, 2018. This work was supported in part by the National Research Foundation of Korea funded by the Korea government (MSIP) under Grant 2018R1A2A1A05023517 and in part by the Brain Korea 21 Plus Project. The review of this paper was arranged by Associate Editor S. Mohanty. (Corresponding author: Byung-Gook Park.) M.-H. Kim, S. Bang, T.-H. Kim, D. K. Lee, and B.-G. Park are with the InterUniversity Semiconductor Research Center and the Department of Electrical and Computer Engineering, Seoul National University, Seoul 08826, South Korea (e-mail:, [email protected]; [email protected]; [email protected]; [email protected]; [email protected]).

Publisher Copyright:
© 2018 IEEE.

Keywords

RRAM
internal overshoot current
uniformity

Access to Document

10.1109/TNANO.2018.2842071

Cite this

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title = "Uniformity Improvement of SiNx-Based Resistive Switching Memory by Suppressed Internal Overshoot Current",

abstract = "In this paper, we have investigated the effect of additional thin SiO2 layer on switching variability of SiNx-based resistive memory (RRAM). We found that excessive LRS state generated in set operation results in large reset current and abrupt reset operation. The abrupt reset operation leads to large distribution of HRS. To investigate the transient characteristics of switching procedure in detail, measurement environment was implemented with equivalent circuit, and measured current from equipment was separated into capacitive and resistive current of resistive memory cell. Consequently, we point the internal overshoot current occurring in set operation as the cause of the excessive leaky state leading to large resistance distributions. Finally, we confirm the effect of low resistance state value (RLRS) and cell capacitance (CDUT) on the internal overshoot current of RRAM.",

keywords = "RRAM, internal overshoot current, uniformity",

author = "Kim, {Min Hwi} and Sungjun Kim and Suhyun Bang and Kim, {Tae Hyeon} and Lee, {Dong Keun} and Seongjae Cho and Park, {Byung Gook}",

note = "Funding Information: Manuscript received April 18, 2018; accepted May 24, 2018. Date of publication May 30, 2018; date of current version July 9, 2018. This work was supported in part by the National Research Foundation of Korea funded by the Korea government (MSIP) under Grant 2018R1A2A1A05023517 and in part by the Brain Korea 21 Plus Project. The review of this paper was arranged by Associate Editor S. Mohanty. (Corresponding author: Byung-Gook Park.) M.-H. Kim, S. Bang, T.-H. Kim, D. K. Lee, and B.-G. Park are with the InterUniversity Semiconductor Research Center and the Department of Electrical and Computer Engineering, Seoul National University, Seoul 08826, South Korea (e-mail:, [email protected]; [email protected]; [email protected]; [email protected]; [email protected]). Publisher Copyright: {\textcopyright} 2018 IEEE.",

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N2 - In this paper, we have investigated the effect of additional thin SiO2 layer on switching variability of SiNx-based resistive memory (RRAM). We found that excessive LRS state generated in set operation results in large reset current and abrupt reset operation. The abrupt reset operation leads to large distribution of HRS. To investigate the transient characteristics of switching procedure in detail, measurement environment was implemented with equivalent circuit, and measured current from equipment was separated into capacitive and resistive current of resistive memory cell. Consequently, we point the internal overshoot current occurring in set operation as the cause of the excessive leaky state leading to large resistance distributions. Finally, we confirm the effect of low resistance state value (RLRS) and cell capacitance (CDUT) on the internal overshoot current of RRAM.

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