Ultrathin SiGe Shell Channel p-Type FinFET on Bulk Si for Sub-10-nm Technology Nodes

In this paper, we propose an ultrathin SiGe shell channel p-type FinFET for sub-10-nm technology nodes. Owing to the large valence band offset (VBO or ΔEv) between SiGe shell and Si fin, a hole quantum well is configured in the high-mobility SiGe region as the major conduction path. The proposed device is optimally designed and characterized in dc and ac. Here, high-κ/metal gate is adopted for strong gate controllability and the high degree of freedom in threshold voltage (V_th) adjustment. For a high reliability, modeling of the mobility (μ) and saturation velocity (v_sat) is carried out for different Ge fractions (x). The E_g and VBO are also determined for different x from empirical data. With the set of modeled values and various quantum-mechanical models, the proposed device has been simulated through rigorous 3-D technology computer-aided design simulation. The designed device shows a high scalability reaching down to L_g = 5 nm. At L_g of 5 nm with a driving voltage (V_DD) of-0.5 V, a current gain cutoff frequency (f_T) = 368.88 GHz, dynamic power = 0.055 fJ/μm, and an intrinsic delay (τ) = 0.37ps are achieved. This is confirmed by the potential low-power and high-speed operations with a strong gate controllability.