Systolic array for 2-D DFT and 2-D DCT

Hyesook Lim, Earl E. Swartzlander

Research output: Contribution to journalConference articlepeer-review

20 Scopus citations

Abstract

A new approach for computing the 2-D DFT and 2-D DCT is presented. A new design of a systolic array for transposed matrix multiplication is also shown in this paper. The new 2-D DFT/DCT avoids the need for the array transposer that was required by earlier implementations, and all processing can be pipelined easily. This approach employs a simple and regular structure that is well suited for VLSI implementation. This array can be easily scaled without modifying the basic control scheme and PE structure.

Original languageEnglish
Pages (from-to)123-131
Number of pages9
JournalProceedings of the International Conference on Application Specific Array Processors
StatePublished - 1994
EventProceedings of the 1994 International Conference on Application Specific Array Processors - San Francisco, CA, USA
Duration: 22 Aug 199424 Aug 1994

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