Abstract
A new approach for computing the 2-D DFT and 2-D DCT is presented. A new design of a systolic array for transposed matrix multiplication is also shown in this paper. The new 2-D DFT/DCT avoids the need for the array transposer that was required by earlier implementations, and all processing can be pipelined easily. This approach employs a simple and regular structure that is well suited for VLSI implementation. This array can be easily scaled without modifying the basic control scheme and PE structure.
Original language | English |
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Pages (from-to) | 123-131 |
Number of pages | 9 |
Journal | Proceedings of the International Conference on Application Specific Array Processors |
State | Published - 1994 |
Event | Proceedings of the 1994 International Conference on Application Specific Array Processors - San Francisco, CA, USA Duration: 22 Aug 1994 → 24 Aug 1994 |