Spatial and Channel-Wise Co-Attention-Based Twin Network System for Inspecting Integrated Circuit Substrate

Eunjeong Choi, Jeongtae Kim

Research output: Contribution to journalArticlepeer-review

Abstract

We propose a deep learning-based reference comparison system based on a twin network (also known as a Siamese network) for high-performance inspection of integrated circuit (IC) substrates. However, reference comparison-based inspection methods may suffer from false positives when inspecting image pairs with variations, such as mis-registration and color changes. To address these problems, we also propose a novel co-attention module that jointly considers the spatial-wise and channel-wise correlations between a feature block in one image and all other feature blocks in the other image to find similar feature blocks in the other image. By comparing the feature block in one image with similar feature blocks in the other image, the module can reduce the differences in areas where registration errors and/or color variation exist, thereby making the proposed inspection method more robust to image variation than existing methods. We verified the usefulness of the proposed method through experiments using an IC substrate dataset. In the experiments, the proposed method achieved significantly improved performance compared with existing methods in terms of precision and f1-score when the recall is almost the same.

Original languageEnglish
Pages (from-to)434-444
Number of pages11
JournalIEEE Transactions on Semiconductor Manufacturing
Volume36
Issue number3
DOIs
StatePublished - 1 Aug 2023

Bibliographical note

Publisher Copyright:
© 1988-2012 IEEE.

Keywords

  • Co-attention module
  • deep learning
  • defect detection
  • integrated circuit substrate
  • packaging
  • printed circuit board
  • reference comparison
  • Siamese network
  • twin network

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