Si CMOS extension and Ge technology perspectives forecast through metal-oxide-semiconductor junctionless field-effect transistor

Youngmin Kim, Junsoo Lee, Seongjae Cho

Research output: Contribution to journalArticlepeer-review

3 Scopus citations

Abstract

Applications of Si have been increasingly exploited and extended to More-Moore, More-than- Moore, and beyond-CMOS approaches. Ge is regarded as one of the supplements for Si owing to its higher carrier mobilities and peculiar band structure, facilitating both advanced and optical applications. As an emerging metal-oxide device, the junctionless field-effect transistor (JLFET) has drawn considerable attention because of its simple process, less performance fluctuation, and stronger immunity against short-channel effects due to the absence of anisotype junctions. In this study, we investigated lateral field scalability, which is equivalent to channel-length scaling, in Si and Ge JLFETs. Through this, we can determine the usability of Si CMOS and hypothesize its replacement by Ge. For simulations with high accuracy, we performed rigorous modeling for μn and μp of Ge, which has seldom been reported. Although Ge has much higher μn and μp than Si, its saturation velocity (vsat) is a more determining factor for maximum Ion. Thus, there is still room for pushing More-Moore technology because Si and Ge have a slight difference in vsat. We compared both p- and n-type JLFETs in terms of Ion, Ioff, Ion/Ioff, and swing with the same channel doping and channel length/thickness. Ion/Ioff is inherently low for Ge but is invariant with VDS. It is estimated that More-Moore approach can be further driven if Si is mounted on a JLFET until Ge has a strong possibility to replace Si for both p- and n-type devices for ultra-low-power applications.

Original languageEnglish
Pages (from-to)847-853
Number of pages7
JournalJournal of Semiconductor Technology and Science
Volume16
Issue number6
DOIs
StatePublished - Dec 2016

Bibliographical note

Publisher Copyright:
© 2016, Institute of Electronics Engineers of Korea. All rights reserved.

Keywords

  • Device simulations
  • Ge channel
  • Junctionless field-effect transistor
  • Low power consumption
  • Si CMOS

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