RRAM-based synapse for neuromorphic system with pattern recognition function

S. Park, H. Kim, M. Choo, J. Noh, A. Sheri, S. Jung, K. Seo, J. Park, S. Kim, W. Lee, J. Shin, D. Lee, G. Choi, J. Woo, E. Cha, J. Jang, C. Park, M. Jeon, B. Lee, B. H. LeeH. Hwang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

118 Scopus citations

Abstract

Feasibility of a high speed pattern recognition system using 1k-bit cross-point synaptic RRAM array and CMOS-based neuron chip has been experimentally demonstrated. Learning capability of a neuromorphic system comprising RRAM synapses and CMOS neurons has been confirmed experimentally, for the first time.

Original languageEnglish
Title of host publication2012 IEEE International Electron Devices Meeting, IEDM 2012
Pages10.2.1-10.2.4
DOIs
StatePublished - 2012
Event2012 IEEE International Electron Devices Meeting, IEDM 2012 - San Francisco, CA, United States
Duration: 10 Dec 201213 Dec 2012

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)0163-1918

Conference

Conference2012 IEEE International Electron Devices Meeting, IEDM 2012
Country/TerritoryUnited States
CitySan Francisco, CA
Period10/12/1213/12/12

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