An advanced Josephson junction fabrication process has been developed for making high-quality junctions for Nb or NbCN integrated circuits. The RHEA (Resist-Hardened Etch and Anodization) process employs a successive plasma hardening of photoresist, reactive-ion-etch, and anodization process sequence to pattern and fabricate fine geometry junction devices to below 1 micron feature size. It is a simple, low-defect process that minimizes critical dimension bias, reduces critical dimension bias dependence on junction geometry, and allows the design flexibility of making either overlap or inside contact from interconnect layer to the junction devices. Key features of the process as well as experimental results will be presented. This process will be compared with other existing Josephson junction patterning processes, and the extendibility of the process to VLSI JJ technology will be discussed.