Refinement of unified random access memory

Seong Wan Ryu; Jin Woo Han; Chung Jin Kim; Sung Jin Choi; Sungho Kim; Jin Soo Kim; Kwang Hee Kim; Jae Sub Oh; Meyong Ho Song; Gi Sung Lee; Yu Chang Park; Jeoung Woo Kim; Yang Kyu Choi

doi:10.1109/TED.2008.2012292

Refinement of unified random access memory

Seong Wan Ryu
, Jin Woo Han
, Chung Jin Kim
, Sung Jin Choi
, Sungho Kim
, Jin Soo Kim
, Kwang Hee Kim
, Jae Sub Oh
, Meyong Ho Song
, Gi Sung Lee
, Yu Chang Park
, Jeoung Woo Kim
, Yang Kyu Choi

Semiconductor Engineering

Research output: Contribution to journal › Article › peer-review

9 Scopus citations

Abstract

This paper investigates how gate height H_g, which refers to the size of a floating-body, affects the program efficiency and retention characteristics of one-transistor DRAM (1T-DRAM) and nonvolatile memory (NVM) for a FinFET SONOS device that has a partially depleted silicon-on-insulator (PDSOI) region as a charge storage node for a 1T-DRAM operation. A device with a lower H_g yields enhanced program efficiency due to the higher impact ionization rate caused by the enlarged PDSOI region for both 1T-DRAM and NVM operations. The device with the lower H_g shows slightly poor retention characteristics in the NVM unlike the 1T-DRAM.

Original language	English
Pages (from-to)	601-608
Number of pages	8
Journal	IEEE Transactions on Electron Devices
Volume	56
Issue number	4
DOIs	https://doi.org/10.1109/TED.2008.2012292
State	Published - 2009

Keywords

FinFET
Gate height
Nonvolatile memory
One-transistor DRAM (1T-DRAM)
Partially depleted silicon-on-insulator (PDSOI)
SONOS
Unified random access memory (URAM)

Access to Document

10.1109/TED.2008.2012292

Cite this

@article{4a81e694b85840dd9d41e9600f5ee004,

title = "Refinement of unified random access memory",

abstract = "This paper investigates how gate height Hg, which refers to the size of a floating-body, affects the program efficiency and retention characteristics of one-transistor DRAM (1T-DRAM) and nonvolatile memory (NVM) for a FinFET SONOS device that has a partially depleted silicon-on-insulator (PDSOI) region as a charge storage node for a 1T-DRAM operation. A device with a lower Hg yields enhanced program efficiency due to the higher impact ionization rate caused by the enlarged PDSOI region for both 1T-DRAM and NVM operations. The device with the lower Hg shows slightly poor retention characteristics in the NVM unlike the 1T-DRAM.",

keywords = "FinFET, Gate height, Nonvolatile memory, One-transistor DRAM (1T-DRAM), Partially depleted silicon-on-insulator (PDSOI), SONOS, Unified random access memory (URAM)",

author = "Ryu, \{Seong Wan\} and Han, \{Jin Woo\} and Kim, \{Chung Jin\} and Choi, \{Sung Jin\} and Sungho Kim and Kim, \{Jin Soo\} and Kim, \{Kwang Hee\} and Oh, \{Jae Sub\} and Song, \{Meyong Ho\} and Lee, \{Gi Sung\} and Park, \{Yu Chang\} and Kim, \{Jeoung Woo\} and Choi, \{Yang Kyu\}",

year = "2009",

doi = "10.1109/TED.2008.2012292",

language = "English",

volume = "56",

pages = "601--608",

journal = "IEEE Transactions on Electron Devices",

issn = "0018-9383",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "4",

}

TY - JOUR

T1 - Refinement of unified random access memory

AU - Ryu, Seong Wan

AU - Han, Jin Woo

AU - Kim, Chung Jin

AU - Choi, Sung Jin

AU - Kim, Sungho

AU - Kim, Jin Soo

AU - Kim, Kwang Hee

AU - Oh, Jae Sub

AU - Song, Meyong Ho

AU - Lee, Gi Sung

AU - Park, Yu Chang

AU - Kim, Jeoung Woo

AU - Choi, Yang Kyu

PY - 2009

Y1 - 2009

N2 - This paper investigates how gate height Hg, which refers to the size of a floating-body, affects the program efficiency and retention characteristics of one-transistor DRAM (1T-DRAM) and nonvolatile memory (NVM) for a FinFET SONOS device that has a partially depleted silicon-on-insulator (PDSOI) region as a charge storage node for a 1T-DRAM operation. A device with a lower Hg yields enhanced program efficiency due to the higher impact ionization rate caused by the enlarged PDSOI region for both 1T-DRAM and NVM operations. The device with the lower Hg shows slightly poor retention characteristics in the NVM unlike the 1T-DRAM.

AB - This paper investigates how gate height Hg, which refers to the size of a floating-body, affects the program efficiency and retention characteristics of one-transistor DRAM (1T-DRAM) and nonvolatile memory (NVM) for a FinFET SONOS device that has a partially depleted silicon-on-insulator (PDSOI) region as a charge storage node for a 1T-DRAM operation. A device with a lower Hg yields enhanced program efficiency due to the higher impact ionization rate caused by the enlarged PDSOI region for both 1T-DRAM and NVM operations. The device with the lower Hg shows slightly poor retention characteristics in the NVM unlike the 1T-DRAM.

KW - FinFET

KW - Gate height

KW - Nonvolatile memory

KW - One-transistor DRAM (1T-DRAM)

KW - Partially depleted silicon-on-insulator (PDSOI)

KW - SONOS

KW - Unified random access memory (URAM)

UR - https://www.scopus.com/pages/publications/67349085083

U2 - 10.1109/TED.2008.2012292

DO - 10.1109/TED.2008.2012292

M3 - Article

AN - SCOPUS:67349085083

SN - 0018-9383

VL - 56

SP - 601

EP - 608

JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

IS - 4

ER -

Refinement of unified random access memory

Abstract

Keywords

Access to Document

Fingerprint

Cite this