Recessed Channel Dual-Gate Single Electron Transistors (RCDG-SETs) for room temperature operation

Sang Hyuk Park; Sangwoo Kang; Seongjae Cho; Dong Seup Lee; Jung Han Lee; Hong Seon Yang; Kwon Chil Kang; Joung Eob Lee; Jong Duk Lee; Byung Gook Park

doi:10.1587/transele.E92.C.647

Recessed Channel Dual-Gate Single Electron Transistors (RCDG-SETs) for room temperature operation

Sang Hyuk Park
, Sangwoo Kang
, Seongjae Cho
, Dong Seup Lee
, Jung Han Lee
, Hong Seon Yang
, Kwon Chil Kang
, Joung Eob Lee
, Jong Duk Lee
, Byung Gook Park

Electronic and Electrical Engineering

Research output: Contribution to journal › Article › peer-review

1 Scopus citations

Abstract

A Recessed-Channel Dual-Gate Single Electron Transistor (RCDG-SET) which has the possibility of room temperature operation is proposed. Side gates of a RCDG-SET form electrical tunneling barriers around a recessed channel, which is newly introduced. Not only gate but also a recessed channel is self aligned to source and drain. Characteristics of a RCDG-SET are compared with those of previous DG-SETs through device simulation (SILVACO). Due to a recessed channel and a self aligned structure, MOSFET current which causes low Peak-to-Valley Current Ratio (PVCR) is suppressed. This property of a RCDG-SET is expected to contribute for room temperature operation.

Original language	English
Pages (from-to)	647-652
Number of pages	6
Journal	IEICE Transactions on Electronics
Volume	E92-C
Issue number	5
DOIs	https://doi.org/10.1587/transele.E92.C.647
State	Published - 2009

Keywords

MOSFET current suppression
Recessed channel
Single electron transistor

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10.1587/transele.E92.C.647

Cite this

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title = "Recessed Channel Dual-Gate Single Electron Transistors (RCDG-SETs) for room temperature operation",

abstract = "A Recessed-Channel Dual-Gate Single Electron Transistor (RCDG-SET) which has the possibility of room temperature operation is proposed. Side gates of a RCDG-SET form electrical tunneling barriers around a recessed channel, which is newly introduced. Not only gate but also a recessed channel is self aligned to source and drain. Characteristics of a RCDG-SET are compared with those of previous DG-SETs through device simulation (SILVACO). Due to a recessed channel and a self aligned structure, MOSFET current which causes low Peak-to-Valley Current Ratio (PVCR) is suppressed. This property of a RCDG-SET is expected to contribute for room temperature operation.",

keywords = "MOSFET current suppression, Recessed channel, Single electron transistor",

author = "Park, \{Sang Hyuk\} and Sangwoo Kang and Seongjae Cho and Lee, \{Dong Seup\} and Lee, \{Jung Han\} and Yang, \{Hong Seon\} and Kang, \{Kwon Chil\} and Lee, \{Joung Eob\} and Lee, \{Jong Duk\} and Park, \{Byung Gook\}",

year = "2009",

doi = "10.1587/transele.E92.C.647",

language = "English",

volume = "E92-C",

pages = "647--652",

journal = "IEICE Transactions on Electronics",

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T1 - Recessed Channel Dual-Gate Single Electron Transistors (RCDG-SETs) for room temperature operation

AU - Park, Sang Hyuk

AU - Kang, Sangwoo

AU - Cho, Seongjae

AU - Lee, Dong Seup

AU - Lee, Jung Han

AU - Yang, Hong Seon

AU - Kang, Kwon Chil

AU - Lee, Joung Eob

AU - Lee, Jong Duk

AU - Park, Byung Gook

PY - 2009

Y1 - 2009

N2 - A Recessed-Channel Dual-Gate Single Electron Transistor (RCDG-SET) which has the possibility of room temperature operation is proposed. Side gates of a RCDG-SET form electrical tunneling barriers around a recessed channel, which is newly introduced. Not only gate but also a recessed channel is self aligned to source and drain. Characteristics of a RCDG-SET are compared with those of previous DG-SETs through device simulation (SILVACO). Due to a recessed channel and a self aligned structure, MOSFET current which causes low Peak-to-Valley Current Ratio (PVCR) is suppressed. This property of a RCDG-SET is expected to contribute for room temperature operation.

AB - A Recessed-Channel Dual-Gate Single Electron Transistor (RCDG-SET) which has the possibility of room temperature operation is proposed. Side gates of a RCDG-SET form electrical tunneling barriers around a recessed channel, which is newly introduced. Not only gate but also a recessed channel is self aligned to source and drain. Characteristics of a RCDG-SET are compared with those of previous DG-SETs through device simulation (SILVACO). Due to a recessed channel and a self aligned structure, MOSFET current which causes low Peak-to-Valley Current Ratio (PVCR) is suppressed. This property of a RCDG-SET is expected to contribute for room temperature operation.

KW - MOSFET current suppression

KW - Recessed channel

KW - Single electron transistor

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M3 - Article

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JO - IEICE Transactions on Electronics

JF - IEICE Transactions on Electronics

IS - 5

ER -

Recessed Channel Dual-Gate Single Electron Transistors (RCDG-SETs) for room temperature operation

Abstract

Keywords

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