Abstract
A Recessed-Channel Dual-Gate Single Electron Transistor (RCDG-SET) which has the possibility of room temperature operation is proposed. Side gates of a RCDG-SET form electrical tunneling barriers around a recessed channel, which is newly introduced. Not only gate but also a recessed channel is self aligned to source and drain. Characteristics of a RCDG-SET are compared with those of previous DG-SETs through device simulation (SILVACO). Due to a recessed channel and a self aligned structure, MOSFET current which causes low Peak-to-Valley Current Ratio (PVCR) is suppressed. This property of a RCDG-SET is expected to contribute for room temperature operation.
Original language | English |
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Pages (from-to) | 647-652 |
Number of pages | 6 |
Journal | IEICE Transactions on Electronics |
Volume | E92-C |
Issue number | 5 |
DOIs | |
State | Published - 2009 |
Keywords
- MOSFET current suppression
- Recessed channel
- Single electron transistor