For the first time, we systematically analyzed the cause of gain degradation without physical damage in discrete III-V device and clarified that the cause was overstress during componentization. In order to reproduce no physical failure condition, medium-level pulse ESD/EOS voltages or TLP currents were zapped at MMIC. Through TCAD simulation, the part of performance degradation and the cause of the modeled degradation mechanism were analyzed together. It was also confirmed that the heat generation position matched the EMMI heating position using TCAD. Meanwhile, after checking the problematic point using EMMI, DC current was applied to weak point, and quasi physical failure point was also secured using FIB. We identified soft overstress and reproduced gain drop with no damage and isolated the weak position of HBT in discrete device with EMMI, and TCAD.
|Title of host publication||2022 IEEE International Reliability Physics Symposium, IRPS 2022 - Proceedings|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|State||Published - 2022|
|Event||2022 IEEE International Reliability Physics Symposium, IRPS 2022 - Dallas, United States|
Duration: 27 Mar 2022 → 31 Mar 2022
|Name||IEEE International Reliability Physics Symposium Proceedings|
|Conference||2022 IEEE International Reliability Physics Symposium, IRPS 2022|
|Period||27/03/22 → 31/03/22|
Bibliographical notePublisher Copyright:
© 2022 IEEE.
- III-V HBT
- Mounting Process
- Physical Damage
- Progressive degradation
- soft overstress