Polarity Control and Weak Fermi-Level Pinning in PdSe2Transistors

Jae Eun Seo, Tanmoy Das, Eunpyo Park, Dongwook Seo, Joon Young Kwak, Jiwon Chang

Research output: Contribution to journalArticlepeer-review

12 Scopus citations

Abstract

Two-dimensional (2D) materials have been considered key materials for the future logic devices due to the excellent electrostatic integrity originating from their ultrathin nature. However, the carrier polarity control of 2D material field-effect transistors (FETs) still remains a challenging issue, hindering the realization of complementary logic function in the 2D material platform. Here, we report a comprehensive study on the electrical characteristics of PdSe2FETs with different metal contacts. It is found that the carrier polarity in PdSe2FETs can be modulated simply by changing the metal contact due to the weak Fermi-level pinning in PdSe2. We demonstrate a complementary metal-oxide-semiconductor (CMOS) inverter using the same channel material PdSe2for n- and p-MOSFETs but with different metal contacts, suggesting the possible realization of PdSe2-based CMOS logic circuits.

Original languageEnglish
Pages (from-to)43480-43488
Number of pages9
JournalACS Applied Materials and Interfaces
Volume13
Issue number36
DOIs
StatePublished - 15 Sep 2021

Bibliographical note

Publisher Copyright:
© 2021 American Chemical Society

Keywords

  • CMOS inverter
  • metal contact
  • palladium diselenide
  • Schottky barrier
  • two-dimensional materials

Fingerprint

Dive into the research topics of 'Polarity Control and Weak Fermi-Level Pinning in PdSe2Transistors'. Together they form a unique fingerprint.

Cite this