Parasitic capacitance optimization of GaAs HBT class E power amplifier for high efficiency CDMA EER transmitter

Ki Young Kim, Ji Hoon Kim, Sung Min Park, Chul Soon Park

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

14 Scopus citations

Abstract

A Class E power amplifier (PA) for a CDMA EER transmitter is implemented with GaAs HBT technology. This paper demonstrates an efficiency improvement with a parasitic capacitance compensation circuit. In order to obtain high output power, the PA needs the large emitter size of a main transistor. The larger the emitter size, the higher the parasitic capacitance should be. In particular, the parasitic CBE affects a distortion of the input voltage signal and decreases the PA's efficiency. Using the compensation circuit, we obtain 7% collector efficiency improvement at a similar output power level. This PA exhibits output power of 29dBm and collector efficiency of 71% at 1.9GHz.

Original languageEnglish
Title of host publicationProceedings of the 2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007
Pages733-736
Number of pages4
DOIs
StatePublished - 2007
Event2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007 - Honolulu, HI, United States
Duration: 3 Jun 20075 Jun 2007

Publication series

NameDigest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
ISSN (Print)1529-2517

Conference

Conference2007 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2007
Country/TerritoryUnited States
CityHonolulu, HI
Period3/06/075/06/07

Keywords

  • Class E
  • Hetero-junction bipolar transistor
  • Monolithic microwave integrated circuit
  • Power amplifier

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