Optimization and modeling of npn-type selector for resistive RRAM in cross-point array structure

Min Hwi Kim; Sunghun Jung; Sungjun Kim; Seongjae Cho; Jong Ho Lee; Hyungcheol Shin; Byung Gook Park

doi:10.1109/SNW.2014.7348605

Optimization and modeling of npn-type selector for resistive RRAM in cross-point array structure

Min Hwi Kim, Sunghun Jung, Sungjun Kim, Seongjae Cho, Jong Ho Lee, Hyungcheol Shin, Byung Gook Park

Electronic and Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

In this paper, we investigate the characteristics of npn device as a candidate for RRAM selector. npn selector shows high current density and selectivity which are key metrics for the bidirectional select device. We confirm that length and doping concentration of base and emitter region can be varied to optimize the characteristic of the selector. In addition, we observe AC characteristic with 10 ns pulse width and interval. We confirm that I-V curve is well fitted with a combination of exponential and quadratic terms.

Original language	English
Title of host publication	2014 Silicon Nanoelectronics Workshop, SNW 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781479956777
DOIs	https://doi.org/10.1109/SNW.2014.7348605
State	Published - 4 Dec 2015
Event	Silicon Nanoelectronics Workshop, SNW 2014 - Honolulu, United States Duration: 8 Jun 2014 → 9 Jun 2014

Publication series

Name	2014 Silicon Nanoelectronics Workshop, SNW 2014

Conference

Conference	Silicon Nanoelectronics Workshop, SNW 2014
Country/Territory	United States
City	Honolulu
Period	8/06/14 → 9/06/14

Bibliographical note

Publisher Copyright:
© 2014 IEEE.

Access to Document

10.1109/SNW.2014.7348605

Cite this

Kim, M. H., Jung, S., Kim, S., Cho, S., Lee, J. H., Shin, H., & Park, B. G. (2015). Optimization and modeling of npn-type selector for resistive RRAM in cross-point array structure. In 2014 Silicon Nanoelectronics Workshop, SNW 2014 Article 7348605 (2014 Silicon Nanoelectronics Workshop, SNW 2014). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SNW.2014.7348605

@inproceedings{a42bfe062c984ad4a8beb1f9deff8da0,

title = "Optimization and modeling of npn-type selector for resistive RRAM in cross-point array structure",

abstract = "In this paper, we investigate the characteristics of npn device as a candidate for RRAM selector. npn selector shows high current density and selectivity which are key metrics for the bidirectional select device. We confirm that length and doping concentration of base and emitter region can be varied to optimize the characteristic of the selector. In addition, we observe AC characteristic with 10 ns pulse width and interval. We confirm that I-V curve is well fitted with a combination of exponential and quadratic terms.",

author = "Kim, {Min Hwi} and Sunghun Jung and Sungjun Kim and Seongjae Cho and Lee, {Jong Ho} and Hyungcheol Shin and Park, {Byung Gook}",

note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; Silicon Nanoelectronics Workshop, SNW 2014 ; Conference date: 08-06-2014 Through 09-06-2014",

year = "2015",

month = dec,

day = "4",

doi = "10.1109/SNW.2014.7348605",

language = "English",

series = "2014 Silicon Nanoelectronics Workshop, SNW 2014",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2014 Silicon Nanoelectronics Workshop, SNW 2014",

}

Kim, MH, Jung, S, Kim, S, Cho, S, Lee, JH, Shin, H & Park, BG 2015, Optimization and modeling of npn-type selector for resistive RRAM in cross-point array structure. in 2014 Silicon Nanoelectronics Workshop, SNW 2014., 7348605, 2014 Silicon Nanoelectronics Workshop, SNW 2014, Institute of Electrical and Electronics Engineers Inc., Silicon Nanoelectronics Workshop, SNW 2014, Honolulu, United States, 8/06/14. https://doi.org/10.1109/SNW.2014.7348605

Optimization and modeling of npn-type selector for resistive RRAM in cross-point array structure. / Kim, Min Hwi; Jung, Sunghun; Kim, Sungjun et al.
2014 Silicon Nanoelectronics Workshop, SNW 2014. Institute of Electrical and Electronics Engineers Inc., 2015. 7348605 (2014 Silicon Nanoelectronics Workshop, SNW 2014).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Optimization and modeling of npn-type selector for resistive RRAM in cross-point array structure

AU - Kim, Min Hwi

AU - Jung, Sunghun

AU - Kim, Sungjun

AU - Cho, Seongjae

AU - Lee, Jong Ho

AU - Shin, Hyungcheol

AU - Park, Byung Gook

PY - 2015/12/4

Y1 - 2015/12/4

N2 - In this paper, we investigate the characteristics of npn device as a candidate for RRAM selector. npn selector shows high current density and selectivity which are key metrics for the bidirectional select device. We confirm that length and doping concentration of base and emitter region can be varied to optimize the characteristic of the selector. In addition, we observe AC characteristic with 10 ns pulse width and interval. We confirm that I-V curve is well fitted with a combination of exponential and quadratic terms.

AB - In this paper, we investigate the characteristics of npn device as a candidate for RRAM selector. npn selector shows high current density and selectivity which are key metrics for the bidirectional select device. We confirm that length and doping concentration of base and emitter region can be varied to optimize the characteristic of the selector. In addition, we observe AC characteristic with 10 ns pulse width and interval. We confirm that I-V curve is well fitted with a combination of exponential and quadratic terms.

UR - http://www.scopus.com/inward/record.url?scp=84963829784&partnerID=8YFLogxK

U2 - 10.1109/SNW.2014.7348605

DO - 10.1109/SNW.2014.7348605

M3 - Conference contribution

AN - SCOPUS:84963829784

T3 - 2014 Silicon Nanoelectronics Workshop, SNW 2014

BT - 2014 Silicon Nanoelectronics Workshop, SNW 2014

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - Silicon Nanoelectronics Workshop, SNW 2014

Y2 - 8 June 2014 through 9 June 2014

ER -

Optimization and modeling of npn-type selector for resistive RRAM in cross-point array structure

Abstract

Publication series

Conference

Bibliographical note

Access to Document

Fingerprint

Cite this