Numerical study of read scheme in one-selector one-resistor crossbar array

Sungho Kim; Hee Dong Kim; Sung Jin Choi

doi:10.1016/j.sse.2015.08.001

Numerical study of read scheme in one-selector one-resistor crossbar array

Sungho Kim, Hee Dong Kim, Sung Jin Choi

Semiconductor Engineering

Research output: Contribution to journal › Article › peer-review

27 Scopus citations

Abstract

A comprehensive numerical circuit analysis of read schemes of a one selector-one resistance change memory (1S1R) crossbar array is carried out. Three schemes - the ground, V/2, and V/3 schemes - are compared with each other in terms of sensing margin and power consumption. Without the aid of a complex analytical approach or SPICE-based simulation, a simple numerical iteration method is developed to simulate entire current flows and node voltages within a crossbar array. Understanding such phenomena is essential in successfully evaluating the electrical specifications of selectors for suppressing intrinsic drawbacks of crossbar arrays, such as sneaky current paths and series line resistance problems. This method provides a quantitative tool for the accurate analysis of crossbar arrays and provides guidelines for developing an optimal read scheme, array configuration, and selector device specifications.

Original language	English
Article number	6859
Pages (from-to)	80-86
Number of pages	7
Journal	Solid-State Electronics
Volume	114
DOIs	https://doi.org/10.1016/j.sse.2015.08.001
State	Published - 26 Dec 2015

Bibliographical note

Publisher Copyright:
© 2015 Elsevier Ltd.

Keywords

1S1R
Crossbar array
Read scheme
RRAM
Selector

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10.1016/j.sse.2015.08.001

Cite this

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title = "Numerical study of read scheme in one-selector one-resistor crossbar array",

abstract = "A comprehensive numerical circuit analysis of read schemes of a one selector-one resistance change memory (1S1R) crossbar array is carried out. Three schemes - the ground, V/2, and V/3 schemes - are compared with each other in terms of sensing margin and power consumption. Without the aid of a complex analytical approach or SPICE-based simulation, a simple numerical iteration method is developed to simulate entire current flows and node voltages within a crossbar array. Understanding such phenomena is essential in successfully evaluating the electrical specifications of selectors for suppressing intrinsic drawbacks of crossbar arrays, such as sneaky current paths and series line resistance problems. This method provides a quantitative tool for the accurate analysis of crossbar arrays and provides guidelines for developing an optimal read scheme, array configuration, and selector device specifications.",

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doi = "10.1016/j.sse.2015.08.001",

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AU - Kim, Sungho

AU - Kim, Hee Dong

AU - Choi, Sung Jin

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N2 - A comprehensive numerical circuit analysis of read schemes of a one selector-one resistance change memory (1S1R) crossbar array is carried out. Three schemes - the ground, V/2, and V/3 schemes - are compared with each other in terms of sensing margin and power consumption. Without the aid of a complex analytical approach or SPICE-based simulation, a simple numerical iteration method is developed to simulate entire current flows and node voltages within a crossbar array. Understanding such phenomena is essential in successfully evaluating the electrical specifications of selectors for suppressing intrinsic drawbacks of crossbar arrays, such as sneaky current paths and series line resistance problems. This method provides a quantitative tool for the accurate analysis of crossbar arrays and provides guidelines for developing an optimal read scheme, array configuration, and selector device specifications.

AB - A comprehensive numerical circuit analysis of read schemes of a one selector-one resistance change memory (1S1R) crossbar array is carried out. Three schemes - the ground, V/2, and V/3 schemes - are compared with each other in terms of sensing margin and power consumption. Without the aid of a complex analytical approach or SPICE-based simulation, a simple numerical iteration method is developed to simulate entire current flows and node voltages within a crossbar array. Understanding such phenomena is essential in successfully evaluating the electrical specifications of selectors for suppressing intrinsic drawbacks of crossbar arrays, such as sneaky current paths and series line resistance problems. This method provides a quantitative tool for the accurate analysis of crossbar arrays and provides guidelines for developing an optimal read scheme, array configuration, and selector device specifications.

KW - 1S1R

KW - Crossbar array

KW - Read scheme

KW - RRAM

KW - Selector

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JO - Solid-State Electronics

JF - Solid-State Electronics

M1 - 6859

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Numerical study of read scheme in one-selector one-resistor crossbar array

Abstract

Bibliographical note

Keywords

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