Capacitance-voltage (C-V) curves for Al/Au nanoparticles embedded in a polystyrene (PS) layer/p-Si devices at 300 K showed a metal-insulator- semiconductor behavior with flat-band voltage shifts of the C-V curves due to the existence of charge trapping. Memory windows between 2.6 and 9.9 V were observed at different sweep voltages, indicative of multilevel behavior. Capacitance-time measurements demonstrated that the charge-trapping capability of Au nanoparticles embedded in a PS layer was maintained for retention times larger than 1 × 104 s without significant degradation. The multilevel charging and discharging mechanisms of the memory devices are described on the basis of the experimental results.
|Journal||Applied Physics Letters|
|State||Published - 13 Jan 2014|