Modeling of the TLB miss rate and the Page fault rate for NVM-based Storage Systems

Non-volatile memory (NVM) is recently attracting interest as a new storage device, and the traditional memory management system designed for hard disk drive (HDD) needs to be reconsidered. In this paper, we revisit the memory management system that adopts NVM as a storage device. In particular, we quantify the memory access latency as the TLB miss rate and the page fault rate are varied. By doing so, we observe that the memory access latency is sensitive to the page size when NVM storage is adopted. We find the reason from the TLB miss rate, which has the increased influence on the memory access latency in comparison with the page fault rate, and there is a trade-off relation between the TLB miss rate and the page fault rate as the page size is varied. To handle such situations, we present a memory access latency model that reflects the page fault rate and the TLB miss rate accurately as a function of the page size. Specifically, we show that the power fit and the exponential fit with two terms are appropriate for the fitting of the TLB miss rate and the page fault rate curves, respectively.