Minimization of gate-induced drain leakage by controlling gate underlap length for low-standby-power operation of 20-nm-level four-terminal silicon-on-insulator fin-shaped field effect transistor

  • Seongjae Cho
  • , Shinichi O'uchi
  • , Kazuhiko Endo
  • , Takashi Matsukawa
  • , Kunihiro Sakamoto
  • , Yongxun Liu
  • , Byung Gook Park
  • , Meishoku Masahara

Research output: Contribution to journal › Article › peer-review

2 Scopus citations

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