Abstract
Non-binary (NB) low-density parity check (LDPC) codes offer stronger error correcting capability than binary LDPC codes. However, the improvement is accompanied by a considerable increase in the decoding complexity and a huge memory requirement, especially in the check node (CN). To overcome these limitations, we propose a memory-reduced NB-LDPC decoding method with an accumulative bubble check (a-bubble check) algorithm. The proposed a-bubble check reduces the memory requirements of the CNs by using the differences between the log-likelihood ratio entries. In addition, we propose a non-uniform memory structure to further decrease the memory capacity of the CN processor. For the GF(64)(160, 80) NB-LDPC code, the proposed memory-reduced NB-LDPC decoding architecture achieves a memory requirement reduction of 32.4% for the CNs and 16.2% for the entire decoder without degrading the error correction capability.
Original language | English |
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Article number | 8063902 |
Pages (from-to) | 1619-1623 |
Number of pages | 5 |
Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
Volume | 65 |
Issue number | 11 |
DOIs | |
State | Published - Nov 2018 |
Bibliographical note
Publisher Copyright:© 2004-2012 IEEE.
Keywords
- Accumulative bubble check
- memory-reduction
- non-binary low-density parity check codes
- non-uniform memory