A novel current-mode CMOS transimpedance amplifier is described. The design uses a common-gate regulated cascode configuration providing low input impedance and low input current noise. HSPICE simulations using a 0.6 μm CMOS process give 3.5 GHz bandwidth, 61 dB transimpedance gain, 4.2 pA/√Hz equivalent input noise current spectral density, and 135 mW power consumption. Measured results of a previous test chip are also presented.
|Number of pages||4|
|Journal||Proceedings - IEEE International Symposium on Circuits and Systems|
|State||Published - 1998|
|Event||Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6) - Monterey, CA, USA|
Duration: 31 May 1998 → 3 Jun 1998