Low-complexity CRC-Aided early stopping unit for parallel turbo decoder

Hyeji Kim, Youngjoo Lee, Ji Hoon Kim

Research output: Contribution to journalArticlepeer-review

4 Scopus citations


A low-complexity distributed cyclic redundancy check (CRC) architecture for the CRC-Aided early stopping unit is proposed. In the previous distributed CRC unit, the general high-order Galois field (GF) multiplier occupies almost the area of the CRC unit and requires high-hardware cost and long critical path-delay. Accordingly, a computation algorithm based on GF arithmetic is analysed and an optimal CRC unit with the small order of the GF multiplier and newly designed linear feedback shift register is proposed. The proposed CRC architecture is implemented in 65 nm CMOS process for radix-22 and radix-24 parallel turbo decoders based on LTEAdvanced. In the radix-22 system, reductions of about 57.1% of gate count, 31.7% of critical path-delay and 44.1% of power consumption are achieved compared with the previous work.

Original languageEnglish
Pages (from-to)1660-1662
Number of pages3
JournalElectronics Letters
Issue number21
StatePublished - 8 Oct 2015

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© 2015 The Institution of Engineering and Technology.


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