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Large scale MoS2 nanosheet logic circuits integrated by photolithography on glass

  • Hyeokjae Kwon
  • , Pyo Jin Jeon
  • , Jin Sung Kim
  • , Tae Young Kim
  • , Hoyeol Yun
  • , Sang Wook Lee
  • , Takhee Lee
  • , Seongil Im

Research output: Contribution to journalArticlepeer-review

31 Scopus citations

Abstract

We demonstrate 500 x 500 μm2 large scale polygrain MoS2 nanosheets and field effect transistor (FET) circuits integrated using those nanosheets, which are initially grown on SiO2/p+-Si by chemical vapor deposition but transferred onto glass substrate to be patterned by photolithography. In fact, large scale growth of two-dimensional MoS2 and its conventional way of patterning for integrated devices have remained as one of the unresolved important issues. In the present study, we achieved maximum linear mobility of ∼9 cm2 V-1 s-1 from single-domain MoS2 FET on SiO2/p+-Si substrate and 0.5-3.0 cm2 V-1 s-1 from large scale MoS2 sheet transferred onto glass. Such reduced mobility is attributed to the transfer process-induced wrinkles and crevices, domain boundaries, residue on MoS2, and loss of the back gate-charging effects that might exist due to SiO2/p+-Si substrate. Among 16 MoS2-based FETs, 13 devices successfully work (yield was more than 80%) producing NOT, NOR, and NAND logic circuits. Inverter (NOT gate) shows quite a high voltage gain over 12 at a supply voltage of 5 V, also displaying 60 μs switching speed in kilohertz dynamics.

Original languageEnglish
Article number044001
Journal2D Materials
Volume3
Issue number4
DOIs
StatePublished - 30 Sep 2016

Bibliographical note

Publisher Copyright:
© 2016 IOP Publishing Ltd.

Keywords

  • CVD-MoS nanosheet
  • Field effect transistor
  • Large scale
  • Logic circuits
  • Photolithography

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