Integrated multiple patch-clamp array chip via lateral cell trapping junctions

J. Seo; C. Ionescu-Zanetti; J. Diamond; R. Lal; L. P. Lee

doi:10.1063/1.1650035

Integrated multiple patch-clamp array chip via lateral cell trapping junctions

J. Seo
, C. Ionescu-Zanetti
, J. Diamond
, R. Lal
, L. P. Lee

Department of Chemistry & Nanoscience

Research output: Contribution to journal › Article › peer-review

105 Scopus citations

Abstract

An integrated multiple patch-clamp array chip via reliable lateral cell trapping junctions was presented. The intersectional design of the microfluidic network provides instantaneous multiple cell addressing. The device geometry results in very low capacitive coupling between the cell reservoir and the patch channel. It was found that the device has the potential for high-throughput, low cost cell-based patch-clamp measurements.

Original language	English
Pages (from-to)	1973-1975
Number of pages	3
Journal	Applied Physics Letters
Volume	84
Issue number	11
DOIs	https://doi.org/10.1063/1.1650035
State	Published - 15 Mar 2004

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title = "Integrated multiple patch-clamp array chip via lateral cell trapping junctions",

abstract = "An integrated multiple patch-clamp array chip via reliable lateral cell trapping junctions was presented. The intersectional design of the microfluidic network provides instantaneous multiple cell addressing. The device geometry results in very low capacitive coupling between the cell reservoir and the patch channel. It was found that the device has the potential for high-throughput, low cost cell-based patch-clamp measurements.",

author = "J. Seo and C. Ionescu-Zanetti and J. Diamond and R. Lal and Lee, \{L. P.\}",

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AU - Seo, J.

AU - Ionescu-Zanetti, C.

AU - Diamond, J.

AU - Lal, R.

AU - Lee, L. P.

PY - 2004/3/15

Y1 - 2004/3/15

N2 - An integrated multiple patch-clamp array chip via reliable lateral cell trapping junctions was presented. The intersectional design of the microfluidic network provides instantaneous multiple cell addressing. The device geometry results in very low capacitive coupling between the cell reservoir and the patch channel. It was found that the device has the potential for high-throughput, low cost cell-based patch-clamp measurements.

AB - An integrated multiple patch-clamp array chip via reliable lateral cell trapping junctions was presented. The intersectional design of the microfluidic network provides instantaneous multiple cell addressing. The device geometry results in very low capacitive coupling between the cell reservoir and the patch channel. It was found that the device has the potential for high-throughput, low cost cell-based patch-clamp measurements.

UR - https://www.scopus.com/pages/publications/1842738068

U2 - 10.1063/1.1650035

DO - 10.1063/1.1650035

M3 - Article

AN - SCOPUS:1842738068

SN - 0003-6951

VL - 84

SP - 1973

EP - 1975

JO - Applied Physics Letters

JF - Applied Physics Letters

IS - 11

ER -

Integrated multiple patch-clamp array chip via lateral cell trapping junctions

Abstract

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