TY - GEN
T1 - Implementation of multi-layer neural network system for neuromorphic hardware architecture
AU - Sun, Wookyung
AU - Park, Junhee
AU - Jo, Sumin
AU - Lee, Jungwon
AU - Shin, Hyungsoon
N1 - Funding Information:
ACKNOWLEDGMENT This work was supported in part by the Basic Science Research Program through the National Research Foundation of Korea (NRF), which was funded by the Ministry of Education, Science and Technology under Grant NRF-2016R1A6A3A11931998.
Publisher Copyright:
© 2019 Institute of Electronics and Information Engineers (IEIE).
PY - 2019/5/3
Y1 - 2019/5/3
N2 - We propose a new neuromorphic hardware system that is optimized to implement a multi-layer guide training algorithm, which is a kind of reinforcement training algorithm. To consider the hardware implementation, we apply the guide training algorithm that is simple and very suitable for memristor synapse. The system is modeled using Simulink and the accuracy of the system is verified by classifying 'T', 'X', and 'V' in 3x3 letter image. The target image of hidden layer is set to the inverted image of the input image. Using this proposed system architecture, the reinforcement learning in multi-layer can be easily implemented in hardware.
AB - We propose a new neuromorphic hardware system that is optimized to implement a multi-layer guide training algorithm, which is a kind of reinforcement training algorithm. To consider the hardware implementation, we apply the guide training algorithm that is simple and very suitable for memristor synapse. The system is modeled using Simulink and the accuracy of the system is verified by classifying 'T', 'X', and 'V' in 3x3 letter image. The target image of hidden layer is set to the inverted image of the input image. Using this proposed system architecture, the reinforcement learning in multi-layer can be easily implemented in hardware.
KW - Guide training algorithm
KW - Hardware architecture
KW - Multi-layer
KW - Neral network
KW - Reinforcement learning
UR - http://www.scopus.com/inward/record.url?scp=85065878400&partnerID=8YFLogxK
U2 - 10.23919/ELINFOCOM.2019.8706456
DO - 10.23919/ELINFOCOM.2019.8706456
M3 - Conference contribution
AN - SCOPUS:85065878400
T3 - ICEIC 2019 - International Conference on Electronics, Information, and Communication
BT - ICEIC 2019 - International Conference on Electronics, Information, and Communication
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 18th International Conference on Electronics, Information, and Communication, ICEIC 2019
Y2 - 22 January 2019 through 25 January 2019
ER -