How tunneling currents reduce plasma-induced charging

Gyeong S. Hwang, Konstantinos P. Giapis

Research output: Contribution to journalArticlepeer-review

10 Scopus citations

Abstract

As semiconductor manufacturing moves towards smaller logic devices and thinner gate oxides, there is serious concern that pattern-dependent charging during plasma etching will impede progress by distorting etch profiles and by causing oxide breakdown. Simulations of the final overetch predict that the use of ultrathin oxides (≤55 nm), combined with a low substrate potential, will actually eliminate notching by enabling electron tunneling from the substrate to decrease surface charging potentials at the bottom of high aspect ratio trenches. Comparison with published experimental results validates the simulations.

Original languageEnglish
Pages (from-to)2928-2930
Number of pages3
JournalApplied Physics Letters
Volume71
Issue number20
DOIs
StatePublished - 17 Nov 1997

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