@inproceedings{b038e16f61d944cebef401498a625d80,
title = "High-speed radix-4 Add-Compare-Select unit for next generation communication systems",
abstract = "ACS (Add-Compare-Select) units are the most important block in FEC (Forward Error Correction) decoders such as Viterbi decoder and Turbo decoder. Due to the increase of performance requirement in next generation mobile communication systems such as LTE-Advanced, high speed operation of ACS units also becomes more important to achieve high throughput requirement. In this paper, we present three types of high-speed radix-4 ACS unit implementation for 12-bit operands and compare hardware complexities for various operating clock periods with 40% margin in 65nm CMOS process.",
keywords = "add-compare-select, high-speed, retiming, VLSI",
author = "Wooseok Byun and Kim, {Ji Hoon}",
year = "2013",
doi = "10.1109/ISOCC.2013.6863958",
language = "English",
isbn = "9781479911417",
series = "ISOCC 2013 - 2013 International SoC Design Conference",
publisher = "IEEE Computer Society",
pages = "148--149",
booktitle = "ISOCC 2013 - 2013 International SoC Design Conference",
note = "2013 International SoC Design Conference, ISOCC 2013 ; Conference date: 17-11-2013 Through 19-11-2013",
}