Gradual bipolar resistive switching in Ni/Si3N4/n+-Si resistive-switching memory device for high-density integration and low-power applications

Sungjun Kim, Sunghun Jung, Min Hwi Kim, Seongjae Cho, Byung Gook Park

Research output: Contribution to journalArticlepeer-review

29 Scopus citations

Abstract

In this work, we report a gradual bipolar resistive switching memory device using Ni/Si3N4/n+-Si structure. Different reset transitions are observed depending on compliance current (ICOMP). The reset switching becomes abrupt around ICOMP = 10 mA, while gradual reset switching with fine controllability is preserved for the devices with ICOMP < 1 mA. We demonstrate multi-level cell (MLC) operation through the modulation of conducting path by controlling ICOMP and reset stop voltage (VSTOP) for ICOMP < 1 mA. For the devices with ICOMP = 10 mA, low resistance state (LRS) shows Ohmic behavior with metallic conducting paths, while high resistance state (HRS) shows non-Ohmic behavior. Also, it is revealed that LRS and HRS conductions follow space-charge-limited current (SCLC) mechanism in low ICOMP regime (ICOMP < 1 mA).

Original languageEnglish
Pages (from-to)94-97
Number of pages4
JournalSolid-State Electronics
Volume114
DOIs
StatePublished - 2 Dec 2015

Bibliographical note

Publisher Copyright:
© 2015 Elsevier Ltd. All rights reserved.

Keywords

  • Abrupt reset
  • Gradual reset
  • Multi-level cell (MLC)
  • Resistive switching
  • SiN-based RRAM
  • Space-charge-limited current (SCLC)

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