TY - GEN
T1 - Gigabit CMOS current-mode optical receivers for high-speed digital interface applications
AU - Han, Jungwon
AU - Tak, Jiyoung
AU - Kim, Hyewon
AU - Park, Sung Min
PY - 2010
Y1 - 2010
N2 - This paper introduces a number of current-mode input configurations for gigabit CMOS optical receivers, including common-gate, regulated-cascode (RGC), current-mirror, etc. Unlike conventional voltage-mode input configurations, the current-mode designs effectively isolate the large input parasitic capacitance from the determination of the bandwidth, hence achieving wide bandwidth for comparable transimpedance gain and power consumption characteristics. Here, noise issues are less stringent since the target applications of these optical receivers include short-reach high-speed digital interface for multimedia consumer electronics, and possibly the emerging gigabit interface for storage networks.
AB - This paper introduces a number of current-mode input configurations for gigabit CMOS optical receivers, including common-gate, regulated-cascode (RGC), current-mirror, etc. Unlike conventional voltage-mode input configurations, the current-mode designs effectively isolate the large input parasitic capacitance from the determination of the bandwidth, hence achieving wide bandwidth for comparable transimpedance gain and power consumption characteristics. Here, noise issues are less stringent since the target applications of these optical receivers include short-reach high-speed digital interface for multimedia consumer electronics, and possibly the emerging gigabit interface for storage networks.
UR - http://www.scopus.com/inward/record.url?scp=78751482494&partnerID=8YFLogxK
U2 - 10.1109/ICSICT.2010.5667856
DO - 10.1109/ICSICT.2010.5667856
M3 - Conference contribution
AN - SCOPUS:78751482494
SN - 9781424457984
T3 - ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings
SP - 46
EP - 49
BT - ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings
T2 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology
Y2 - 1 November 2010 through 4 November 2010
ER -