Fabrication and characterization of fin SONOS flash memory with separated double-gate structure

Jang Gn Yun; Yoon Kim; Il Han Park; Jung Hoon Lee; Sangwoo Kang; Dong Hua Lee; Seongjae Cho; Doo Hyun Kim; Gil Sung Lee; Won Bo Sim; Younghwan Son; Hyungcheol Shin; Jong Duk Lee; Byung Gook Park

doi:10.1016/j.sse.2008.06.021

Fabrication and characterization of fin SONOS flash memory with separated double-gate structure

Jang Gn Yun, Yoon Kim, Il Han Park, Jung Hoon Lee, Sangwoo Kang, Dong Hua Lee, Seongjae Cho, Doo Hyun Kim, Gil Sung Lee, Won Bo Sim, Younghwan Son, Hyungcheol Shin, Jong Duk Lee, Byung Gook Park

Electronic and Electrical Engineering

Research output: Contribution to journal › Article › peer-review

12 Scopus citations

Abstract

In this work, we have fabricated and characterized the 3-dimensional fin SONOS flash memory. This device has two independent gates on both sides of Si-fin and each of them governs two side-channels. Fabrication flow and array structure are described as well as operation schemes. The 4-bit/cell operation is demonstrated with the multi-bit concept in fabricated devices. Some fabrication issues related with device characteristics and reliabilities are delivered.

Original language	English
Pages (from-to)	1498-1504
Number of pages	7
Journal	Solid-State Electronics
Volume	52
Issue number	10
DOIs	https://doi.org/10.1016/j.sse.2008.06.021
State	Published - Oct 2008

Bibliographical note

Funding Information:
This work was supported by Samsung Electronics with a project entitled as ‘The Research on Structure and Characteristics of the Nonvolatile Memory Devices’.

Keywords

3-Dimensional structure
4-Bit/cell operation
Fin SONOS flash memory
Separated double-gate

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10.1016/j.sse.2008.06.021

Cite this

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title = "Fabrication and characterization of fin SONOS flash memory with separated double-gate structure",

abstract = "In this work, we have fabricated and characterized the 3-dimensional fin SONOS flash memory. This device has two independent gates on both sides of Si-fin and each of them governs two side-channels. Fabrication flow and array structure are described as well as operation schemes. The 4-bit/cell operation is demonstrated with the multi-bit concept in fabricated devices. Some fabrication issues related with device characteristics and reliabilities are delivered.",

keywords = "3-Dimensional structure, 4-Bit/cell operation, Fin SONOS flash memory, Separated double-gate",

author = "Yun, {Jang Gn} and Yoon Kim and Park, {Il Han} and Lee, {Jung Hoon} and Sangwoo Kang and Lee, {Dong Hua} and Seongjae Cho and Kim, {Doo Hyun} and Lee, {Gil Sung} and Sim, {Won Bo} and Younghwan Son and Hyungcheol Shin and Lee, {Jong Duk} and Park, {Byung Gook}",

note = "Funding Information: This work was supported by Samsung Electronics with a project entitled as {\textquoteleft}The Research on Structure and Characteristics of the Nonvolatile Memory Devices{\textquoteright}. ",

year = "2008",

month = oct,

doi = "10.1016/j.sse.2008.06.021",

language = "English",

volume = "52",

pages = "1498--1504",

journal = "Solid-State Electronics",

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T1 - Fabrication and characterization of fin SONOS flash memory with separated double-gate structure

AU - Yun, Jang Gn

AU - Kim, Yoon

AU - Park, Il Han

AU - Lee, Jung Hoon

AU - Kang, Sangwoo

AU - Lee, Dong Hua

AU - Cho, Seongjae

AU - Kim, Doo Hyun

AU - Lee, Gil Sung

AU - Sim, Won Bo

AU - Son, Younghwan

AU - Shin, Hyungcheol

AU - Lee, Jong Duk

AU - Park, Byung Gook

N1 - Funding Information: This work was supported by Samsung Electronics with a project entitled as ‘The Research on Structure and Characteristics of the Nonvolatile Memory Devices’.

PY - 2008/10

Y1 - 2008/10

N2 - In this work, we have fabricated and characterized the 3-dimensional fin SONOS flash memory. This device has two independent gates on both sides of Si-fin and each of them governs two side-channels. Fabrication flow and array structure are described as well as operation schemes. The 4-bit/cell operation is demonstrated with the multi-bit concept in fabricated devices. Some fabrication issues related with device characteristics and reliabilities are delivered.

AB - In this work, we have fabricated and characterized the 3-dimensional fin SONOS flash memory. This device has two independent gates on both sides of Si-fin and each of them governs two side-channels. Fabrication flow and array structure are described as well as operation schemes. The 4-bit/cell operation is demonstrated with the multi-bit concept in fabricated devices. Some fabrication issues related with device characteristics and reliabilities are delivered.

KW - 3-Dimensional structure

KW - 4-Bit/cell operation

KW - Fin SONOS flash memory

KW - Separated double-gate

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DO - 10.1016/j.sse.2008.06.021

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SP - 1498

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JO - Solid-State Electronics

JF - Solid-State Electronics

IS - 10

ER -

Fabrication and characterization of fin SONOS flash memory with separated double-gate structure

Abstract

Bibliographical note

Keywords

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