Enhancement of program speed in dopant-segregated Schottky-Barrier (DSSB) finFET SONOS for NAND-type flash memory

Sung Jin Choi; Jin Woo Han; Sungho Kim; Moon Gyu Jang; Jin Soo Kim; Kwang Hee Kim; Gi Sung Lee; Jae Sub Oh; Myeong Ho Song; Yun Chang Park; Jeoung Woo Kim; Yang Kyu Choi

doi:10.1109/LED.2008.2008667

Enhancement of program speed in dopant-segregated Schottky-Barrier (DSSB) finFET SONOS for NAND-type flash memory

Sung Jin Choi
, Jin Woo Han
, Sungho Kim
, Moon Gyu Jang
, Jin Soo Kim
, Kwang Hee Kim
, Gi Sung Lee
, Jae Sub Oh
, Myeong Ho Song
, Yun Chang Park
, Jeoung Woo Kim
, Yang Kyu Choi

Semiconductor Engineering

Research output: Contribution to journal › Article › peer-review

20 Scopus citations

Abstract

A dopant-segregated (DS) Schottky-barrier (DSSB) FinFET SONOS for NAND Flash memory with a proposed architecture is demonstrated for the first time. A DSSB technique with a nickel-silicided source/drain (S/D) is integrated in the FinFET with a 30-50-nm range of fin width. Compared with the conventional FinFET SONOS, the DSSB FinFET SONOS boasts very fast programming time with low voltage. For a programming state, hot electrons triggered by sharp band bending at the DS S/D region are used. As a result, a threshold voltage (V_th) shift of 4.5 V is achieved in a fast programming time of 100 ns.

Original language	English
Pages (from-to)	78-81
Number of pages	4
Journal	IEEE Electron Device Letters
Volume	30
Issue number	1
DOIs	https://doi.org/10.1109/LED.2008.2008667
State	Published - 2009

Keywords

Dopant segregated (DS)
FinFET
Flash memory
Hot electrons
NAND Flash
Nonvolatile memory
Schottky-barrier MOSFET
Silicon-oxide-nitride-oxide-silicon (SONOS)
SONOS memory

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10.1109/LED.2008.2008667

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title = "Enhancement of program speed in dopant-segregated Schottky-Barrier (DSSB) finFET SONOS for NAND-type flash memory",

abstract = "A dopant-segregated (DS) Schottky-barrier (DSSB) FinFET SONOS for NAND Flash memory with a proposed architecture is demonstrated for the first time. A DSSB technique with a nickel-silicided source/drain (S/D) is integrated in the FinFET with a 30-50-nm range of fin width. Compared with the conventional FinFET SONOS, the DSSB FinFET SONOS boasts very fast programming time with low voltage. For a programming state, hot electrons triggered by sharp band bending at the DS S/D region are used. As a result, a threshold voltage (Vth) shift of 4.5 V is achieved in a fast programming time of 100 ns.",

keywords = "Dopant segregated (DS), FinFET, Flash memory, Hot electrons, NAND Flash, Nonvolatile memory, Schottky-barrier MOSFET, Silicon-oxide-nitride-oxide-silicon (SONOS), SONOS memory",

author = "Choi, \{Sung Jin\} and Han, \{Jin Woo\} and Sungho Kim and Jang, \{Moon Gyu\} and Kim, \{Jin Soo\} and Kim, \{Kwang Hee\} and Lee, \{Gi Sung\} and Oh, \{Jae Sub\} and Song, \{Myeong Ho\} and Park, \{Yun Chang\} and Kim, \{Jeoung Woo\} and Choi, \{Yang Kyu\}",

year = "2009",

doi = "10.1109/LED.2008.2008667",

language = "English",

volume = "30",

pages = "78--81",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "1",

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T1 - Enhancement of program speed in dopant-segregated Schottky-Barrier (DSSB) finFET SONOS for NAND-type flash memory

AU - Choi, Sung Jin

AU - Han, Jin Woo

AU - Kim, Sungho

AU - Jang, Moon Gyu

AU - Kim, Jin Soo

AU - Kim, Kwang Hee

AU - Lee, Gi Sung

AU - Oh, Jae Sub

AU - Song, Myeong Ho

AU - Park, Yun Chang

AU - Kim, Jeoung Woo

AU - Choi, Yang Kyu

PY - 2009

Y1 - 2009

N2 - A dopant-segregated (DS) Schottky-barrier (DSSB) FinFET SONOS for NAND Flash memory with a proposed architecture is demonstrated for the first time. A DSSB technique with a nickel-silicided source/drain (S/D) is integrated in the FinFET with a 30-50-nm range of fin width. Compared with the conventional FinFET SONOS, the DSSB FinFET SONOS boasts very fast programming time with low voltage. For a programming state, hot electrons triggered by sharp band bending at the DS S/D region are used. As a result, a threshold voltage (Vth) shift of 4.5 V is achieved in a fast programming time of 100 ns.

AB - A dopant-segregated (DS) Schottky-barrier (DSSB) FinFET SONOS for NAND Flash memory with a proposed architecture is demonstrated for the first time. A DSSB technique with a nickel-silicided source/drain (S/D) is integrated in the FinFET with a 30-50-nm range of fin width. Compared with the conventional FinFET SONOS, the DSSB FinFET SONOS boasts very fast programming time with low voltage. For a programming state, hot electrons triggered by sharp band bending at the DS S/D region are used. As a result, a threshold voltage (Vth) shift of 4.5 V is achieved in a fast programming time of 100 ns.

KW - Dopant segregated (DS)

KW - FinFET

KW - Flash memory

KW - Hot electrons

KW - NAND Flash

KW - Nonvolatile memory

KW - Schottky-barrier MOSFET

KW - Silicon-oxide-nitride-oxide-silicon (SONOS)

KW - SONOS memory

UR - https://www.scopus.com/pages/publications/58149494550

U2 - 10.1109/LED.2008.2008667

DO - 10.1109/LED.2008.2008667

M3 - Article

AN - SCOPUS:58149494550

SN - 0741-3106

VL - 30

SP - 78

EP - 81

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

IS - 1

ER -

Enhancement of program speed in dopant-segregated Schottky-Barrier (DSSB) finFET SONOS for NAND-type flash memory

Abstract

Keywords

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