A new approach for the systolic implementation of FFT algorithms is presented. The proposed approach is based on the fundamental principle that a 1-dimensional DFT can be decomposed to a 2-dimensional DFT (with or without twiddle factors) and the 2-dimensional DFT can be computed efficiently on a 2-dimensional systolic array. The essence of the proposed systolic array is to combine different types of semi-systolic arrays into one array so that the resulting array becomes truly systolic. The proposed systolic array does not require any preloading of input data and it produces output data at boundary PEs. No networks for intermediate spectrum transposition between constituent 1-dimensional transforms are required; therefore the entire processing is fully pipelined. This approach also has significant advantages over existing architectures in reduced throughput and latency for large transforms.
|Title of host publication||Conference Record of the 29th Asilomar Conference on Signals, Systems and Computers, ACSSC 1995|
|Publisher||IEEE Computer Society|
|Number of pages||5|
|State||Published - 1995|
|Event||29th Asilomar Conference on Signals, Systems and Computers, ACSSC 1995 - Pacific Grove, United States|
Duration: 30 Oct 1995 → 1 Nov 1995
|Name||Conference Record - Asilomar Conference on Signals, Systems and Computers|
|Conference||29th Asilomar Conference on Signals, Systems and Computers, ACSSC 1995|
|Period||30/10/95 → 1/11/95|
Bibliographical notePublisher Copyright:
© 1995 IEEE.