Abstract
Due to the recent computing paradigm shift from desktop to cloud environments, NVDIMM-based memory architectures for big data processing are catching considerable interest. In this paper, we present an efficient page management scheme for large-scale NVDIMM memory. The proposed architecture carefully determines the page size of a large-scale memory system such that TLB hit ratio is improved significantly without increasing the page fault ratio, thereby allowing big-data processing efficiently, which was not easy in conventional DRAM-based memory systems. The main contribution of this paper is that it proposes a new paradigm of "NVDIMM-based large memory architecture" instead of conventional "DRAM-based memory system" and presents efficient management techniques for that architecture by considering both TLB performances and page fault rates.
Original language | English |
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Title of host publication | Proceedings - 2017 4th International Conference on Information Science and Control Engineering, ICISCE 2017 |
Editors | Ying Dai, Shaozi Li, Yun Cheng |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 283-287 |
Number of pages | 5 |
ISBN (Electronic) | 9781538630136 |
DOIs | |
State | Published - 14 Nov 2017 |
Event | 4th International Conference on Information Science and Control Engineering, ICISCE 2017 - Changsha, Hunan, China Duration: 21 Jul 2017 → 23 Jul 2017 |
Publication series
Name | Proceedings - 2017 4th International Conference on Information Science and Control Engineering, ICISCE 2017 |
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Conference
Conference | 4th International Conference on Information Science and Control Engineering, ICISCE 2017 |
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Country/Territory | China |
City | Changsha, Hunan |
Period | 21/07/17 → 23/07/17 |
Bibliographical note
Publisher Copyright:© 2017 IEEE.
Keywords
- Big data
- NVDIMM
- Page fault
- Page management
- TLB