Dual-mode CMOS feed-forward transimpedance amplifier for LADARs

Seung Hoon Kim; Sang Bock Cho; Sung Min Park

doi:10.1049/el.2014.2678

Dual-mode CMOS feed-forward transimpedance amplifier for LADARs

Seung Hoon Kim, Sang Bock Cho, Sung Min Park

Electronic and Electrical Engineering

Research output: Contribution to journal › Article › peer-review

11 Scopus citations

Abstract

A dual-mode transimpedance amplifier (TIA) is realised in a 0.18 μm CMOS technology for the applications of 1 Gbit/s laser detection and ranging (LADAR) systems. The proposed dual-mode CMOS feedforward TIA consists of a voltage-mode inverter input stage with a feedback resistor, followed by a current-mode common-gate amplifier with a feed-forward technique applied at the gate so as to achieve low noise, low power consumption, high gain and wide bandwidth characteristics simultaneously. The measured results demonstrate 76 dBΩ transimpedance gain, 720 MHz bandwidth for 0.5 pF photodiode capacitance, -26.3 dBm sensitivity for 10^-12 bit error rate and 20.7 mW power dissipation from a single 1.8 V supply.

Original language	English
Pages (from-to)	1678-1680
Number of pages	3
Journal	Electronics Letters
Volume	50
Issue number	23
DOIs	https://doi.org/10.1049/el.2014.2678
State	Published - 6 Nov 2014

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© The Institution of Engineering and Technology 2014.

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abstract = "A dual-mode transimpedance amplifier (TIA) is realised in a 0.18 μm CMOS technology for the applications of 1 Gbit/s laser detection and ranging (LADAR) systems. The proposed dual-mode CMOS feedforward TIA consists of a voltage-mode inverter input stage with a feedback resistor, followed by a current-mode common-gate amplifier with a feed-forward technique applied at the gate so as to achieve low noise, low power consumption, high gain and wide bandwidth characteristics simultaneously. The measured results demonstrate 76 dBΩ transimpedance gain, 720 MHz bandwidth for 0.5 pF photodiode capacitance, -26.3 dBm sensitivity for 10-12 bit error rate and 20.7 mW power dissipation from a single 1.8 V supply.",

author = "Kim, {Seung Hoon} and Cho, {Sang Bock} and Park, {Sung Min}",

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doi = "10.1049/el.2014.2678",

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AU - Cho, Sang Bock

AU - Park, Sung Min

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N2 - A dual-mode transimpedance amplifier (TIA) is realised in a 0.18 μm CMOS technology for the applications of 1 Gbit/s laser detection and ranging (LADAR) systems. The proposed dual-mode CMOS feedforward TIA consists of a voltage-mode inverter input stage with a feedback resistor, followed by a current-mode common-gate amplifier with a feed-forward technique applied at the gate so as to achieve low noise, low power consumption, high gain and wide bandwidth characteristics simultaneously. The measured results demonstrate 76 dBΩ transimpedance gain, 720 MHz bandwidth for 0.5 pF photodiode capacitance, -26.3 dBm sensitivity for 10-12 bit error rate and 20.7 mW power dissipation from a single 1.8 V supply.

AB - A dual-mode transimpedance amplifier (TIA) is realised in a 0.18 μm CMOS technology for the applications of 1 Gbit/s laser detection and ranging (LADAR) systems. The proposed dual-mode CMOS feedforward TIA consists of a voltage-mode inverter input stage with a feedback resistor, followed by a current-mode common-gate amplifier with a feed-forward technique applied at the gate so as to achieve low noise, low power consumption, high gain and wide bandwidth characteristics simultaneously. The measured results demonstrate 76 dBΩ transimpedance gain, 720 MHz bandwidth for 0.5 pF photodiode capacitance, -26.3 dBm sensitivity for 10-12 bit error rate and 20.7 mW power dissipation from a single 1.8 V supply.

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Dual-mode CMOS feed-forward transimpedance amplifier for LADARs

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