Dual gate ZnO-based thin-film transistors operating at 5 V: Nor gate application

C. H. Park; Kwang H. Lee; Min Suk Oh; Kimoon Lee; Seongil Im; Byoung H. Lee; Myung M. Sung

doi:10.1109/LED.2008.2007973

Dual gate ZnO-based thin-film transistors operating at 5 V: Nor gate application

C. H. Park, Kwang H. Lee, Min Suk Oh, Kimoon Lee, Seongil Im, Byoung H. Lee, Myung M. Sung

Chemical Engineering & Materials Science

Research output: Contribution to journal › Article › peer-review

24 Scopus citations

Abstract

We report on the fabrication of ZnO-based dual gate (DG) thin-film transistors (TFTs) with 20-nm-thick AI₂O₃ for both top and bottom dielectrics, which were deposited by atomic layer deposition on glass substrates at 200 °C. As characterized with single gate (SG), DG, and ground plane (GP) modes, our ZnO TFTs are well operated under 5 V. DG-mode TFT showed a field mobility of 0.38 cm²/V · s, a high saturation current of 6 μA, and an on/off current ratio of ∼10⁶, while SG- and GP-mode TFTs showed a similar value of mobility but with lower current. Using DG and GP modes, nor gate operation was well demonstrated.

Original language	English
Pages (from-to)	30-32
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	30
Issue number	1
DOIs	https://doi.org/10.1109/LED.2008.2007973
State	Published - 2009

Keywords

Dual gate (DG)
NOR logic gate
Thin-film transistors (TFTs)
ZnO

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10.1109/LED.2008.2007973

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@article{c9adc70ba66043d7869498666061be19,

title = "Dual gate ZnO-based thin-film transistors operating at 5 V: Nor gate application",

abstract = "We report on the fabrication of ZnO-based dual gate (DG) thin-film transistors (TFTs) with 20-nm-thick AI2O3 for both top and bottom dielectrics, which were deposited by atomic layer deposition on glass substrates at 200 °C. As characterized with single gate (SG), DG, and ground plane (GP) modes, our ZnO TFTs are well operated under 5 V. DG-mode TFT showed a field mobility of 0.38 cm2/V · s, a high saturation current of 6 μA, and an on/off current ratio of ∼106, while SG- and GP-mode TFTs showed a similar value of mobility but with lower current. Using DG and GP modes, nor gate operation was well demonstrated.",

keywords = "Dual gate (DG), NOR logic gate, Thin-film transistors (TFTs), ZnO",

author = "Park, {C. H.} and Lee, {Kwang H.} and Oh, {Min Suk} and Kimoon Lee and Seongil Im and Lee, {Byoung H.} and Sung, {Myung M.}",

note = "Funding Information: Manuscript received September 25, 2008. Current version published December 24, 2008. This work was supported in part by the Fundamental R&D Program for Core Technology of Materials funded by the Ministry of Commerce, Industry and Energy, by the IT R&D program of MKE/IITA [2006-S079-02, Smart window with transparent electronic devices], and by the Brain Korea 21 Program. The review of this letter was arranged by Editor A. Nathan.",

year = "2009",

doi = "10.1109/LED.2008.2007973",

language = "English",

volume = "30",

pages = "30--32",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "1",

}

TY - JOUR

T1 - Dual gate ZnO-based thin-film transistors operating at 5 V

T2 - Nor gate application

AU - Park, C. H.

AU - Lee, Kwang H.

AU - Oh, Min Suk

AU - Lee, Kimoon

AU - Im, Seongil

AU - Lee, Byoung H.

AU - Sung, Myung M.

N1 - Funding Information: Manuscript received September 25, 2008. Current version published December 24, 2008. This work was supported in part by the Fundamental R&D Program for Core Technology of Materials funded by the Ministry of Commerce, Industry and Energy, by the IT R&D program of MKE/IITA [2006-S079-02, Smart window with transparent electronic devices], and by the Brain Korea 21 Program. The review of this letter was arranged by Editor A. Nathan.

PY - 2009

Y1 - 2009

N2 - We report on the fabrication of ZnO-based dual gate (DG) thin-film transistors (TFTs) with 20-nm-thick AI2O3 for both top and bottom dielectrics, which were deposited by atomic layer deposition on glass substrates at 200 °C. As characterized with single gate (SG), DG, and ground plane (GP) modes, our ZnO TFTs are well operated under 5 V. DG-mode TFT showed a field mobility of 0.38 cm2/V · s, a high saturation current of 6 μA, and an on/off current ratio of ∼106, while SG- and GP-mode TFTs showed a similar value of mobility but with lower current. Using DG and GP modes, nor gate operation was well demonstrated.

AB - We report on the fabrication of ZnO-based dual gate (DG) thin-film transistors (TFTs) with 20-nm-thick AI2O3 for both top and bottom dielectrics, which were deposited by atomic layer deposition on glass substrates at 200 °C. As characterized with single gate (SG), DG, and ground plane (GP) modes, our ZnO TFTs are well operated under 5 V. DG-mode TFT showed a field mobility of 0.38 cm2/V · s, a high saturation current of 6 μA, and an on/off current ratio of ∼106, while SG- and GP-mode TFTs showed a similar value of mobility but with lower current. Using DG and GP modes, nor gate operation was well demonstrated.

KW - Dual gate (DG)

KW - NOR logic gate

KW - Thin-film transistors (TFTs)

KW - ZnO

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U2 - 10.1109/LED.2008.2007973

DO - 10.1109/LED.2008.2007973

M3 - Article

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VL - 30

SP - 30

EP - 32

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

SN - 0741-3106

IS - 1

ER -

Dual gate ZnO-based thin-film transistors operating at 5 V: Nor gate application

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Keywords

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