Recently, a number of semiconductor devices have been widely researched in order to make breakthroughs from the short-channel effects (SCEs) and high standby power dissipation of the conventional metal-oxide-semiconductor field-effect transistors (MOSFETs). In this paper, a design optimization for the silicon nanowire tunneling field-effect transistor (SNW TFET) based on PNPN multi-junction structure and its radio frequency (RF) performances are presented by using technology computer-aided design (TCAD) simulations. The design optimization was carried out in terms of primary direct-current (DC) parameters such as on-current (I on), off-current (I off), current ratio (I on/I off), and subthreshold swing (SS). Based on the parameters from optimized DC characteristics, basic radio frequency (RF) performances such as cut-off frequency (f T) and maximum oscillation frequency (f max) were analyzed. The simulated device had a channel length of 60 nm and a SNW radius of 10 nm. The design variable was width of the n-doped layer. For an optimally designed PNPN SNW TFET, SS of 34 mV/dec and I on of 35 μA/μm were obtained. For this device, f T and f max were 80 GHz and 800 GHz, respectively.
Bibliographical noteFunding Information:
This research was supported in part by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Korean Ministry of Education, Science and Technology (MEST) ( 2010-0020979 ) and in part by Samsung Electronics Co., Ltd .
- Design optimization
- PNPN multi-junction
- Radio frequency (RF)
- Silicon nanowire (SNW)
- Tunneling field-effect transistor (TFET)