TY - JOUR
T1 - Design and characterization of electrically self-isolated GaN-on-Si junctionless fin-shapedchannel field-effect transistor with higher cost-effectiveness for low-power applications
AU - Lee, Seongmin
AU - Lee, Jeongmin
AU - Cho, Seongjae
N1 - Publisher Copyright:
© 2015 The Japan Society of Applied Physics.
PY - 2015/8/1
Y1 - 2015/8/1
N2 - A GaN-on-Si junctionless FET with a feasible structure is suggested and simulated. A silicon-on-insulator channel is replaced by a GaN-on-Si channel in the proposed device. The GaN-on-Si heterostructure forms an electrically self-isolated channel owing to its large band offset. Two- and three-dimensional (2D and 3D) device simulations were cooperatively performed to optimize the device in terms of gate length, channel thickness, channel doping concentration, and substrate concentration, targeting low-power applications.
AB - A GaN-on-Si junctionless FET with a feasible structure is suggested and simulated. A silicon-on-insulator channel is replaced by a GaN-on-Si channel in the proposed device. The GaN-on-Si heterostructure forms an electrically self-isolated channel owing to its large band offset. Two- and three-dimensional (2D and 3D) device simulations were cooperatively performed to optimize the device in terms of gate length, channel thickness, channel doping concentration, and substrate concentration, targeting low-power applications.
UR - http://www.scopus.com/inward/record.url?scp=84938386256&partnerID=8YFLogxK
U2 - 10.7567/JJAP.54.084301
DO - 10.7567/JJAP.54.084301
M3 - Article
AN - SCOPUS:84938386256
SN - 0021-4922
VL - 54
JO - Japanese Journal of Applied Physics
JF - Japanese Journal of Applied Physics
IS - 8
M1 - 084301
ER -