Dependence of program efficiency on channel conditions regarding NOR-type flash memory devices fabricated on a silicon-on-insulator (SOI) substrate

Flash memory devices are fabricated on a silicon-on-insulator (SOI) substrate to satisfy the demand for higher program efficiency occasionally. However, since metal-oxide-semiconductor field-effect transistors (MOSFETs) on SOI substrate have floating bodies and corresponding effects, it is quite difficult to make a precise prediction of the program efficiency for SOI-based NOR-type flash memory devices by making use of the channel hot electron injection (CHEI) mechanism in program operation. In this work, the dependence of the program efficiency for SOI-based NOR-type flash memory devices on the channel conditions with regard to the SOI thickness and the SOI doping concentration has been thoroughly investigated by using a numerical device simulation. The state of the silicon channel (fully/partially depleted channel) turns out to be strongly correlated with these process parameters that affect the hole accumulation, which changes the program efficiency.