Crossbar RRAM arrays: Selector device requirements during write operation

Sungho Kim, Jiantao Zhou, Wei D. Lu

Research output: Contribution to journalArticlepeer-review

127 Scopus citations

Abstract

A comprehensive analysis of write operations (SET and RESET) in a resistance-change memory (resistive random access memory) crossbar array is carried out. Three types of resistive switching memory cells-nonlinear, rectifying-SET, and rectifying-RESET-are compared with each other in terms of voltage delivery, current delivery, and power consumption. Two different write schemes, V/2 and V/3, were considered, and the V/2 write scheme is preferred due to much lower power consumption. A simple numerical method was developed that simulates entire current flows and node voltages within a crossbar array and provides a quantitative tool for the accurate analysis of crossbar arrays and guidelines for developing reliable write operation.

Original languageEnglish
Article number6835201
Pages (from-to)2820-2826
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume61
Issue number8
DOIs
StatePublished - Aug 2014

Keywords

  • Crossbar
  • resistive random access memory (RRAM)
  • selector device
  • sneak path
  • write margin
  • write scheme.

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