Core-Shell Dual-Gate Nanowire Synaptic Transistor with Short/Long-Term Plasticity

Md Hasan Raza Ansari; Daehwan Kim; Seongjae Cho; Jong Ho Lee; Byung Gook Park

doi:10.1109/EDTM50988.2021.9420876

Core-Shell Dual-Gate Nanowire Synaptic Transistor with Short/Long-Term Plasticity

Md Hasan Raza Ansari, Daehwan Kim, Seongjae Cho, Jong Ho Lee, Byung Gook Park

Electronic and Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Scopus citations

Abstract

This work demonstrates design and performances of core-shell dual-gate nanowire synaptic transistor with short/long term plasticity. The novel structure helps equip better capacitive coupling between dual gates through full depletion of carriers from the Si channel and construct deeper potential well for charge storage, which eventually increases the probability for short-term-to-long-term memory transition by reducing the recombination. The dual-gate operation effectively realizes the short-and the long-term potentiation in the proposed device for hardware-driven neuromorphic system.

Original language	English
Title of host publication	2021 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728181769
DOIs	https://doi.org/10.1109/EDTM50988.2021.9420876
State	Published - 8 Apr 2021
Event	5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021 - Chengdu, China Duration: 8 Apr 2021 → 11 Apr 2021

Publication series

Name	2021 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021

Conference

Conference	5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021
Country/Territory	China
City	Chengdu
Period	8/04/21 → 11/04/21

Bibliographical note

Funding Information:
Acknowledgments This work was supported in part by Nano · Material Technology Development Program through the National Research Foundation (NRF) funded by the Ministry of Science and ICT (MSIT) under Grant NRF-2016M3A7B4910348, and in part by Institute of Information and Communications Technology Planning and Evaluation (IITP) grant funded by MSIT under Grant 2020-0-01294-001.

Publisher Copyright:
© 2021 IEEE.

Keywords

core-shell dual-gate
neuromorphic hardware
short-term plasticity
synaptic transistor

Access to Document

10.1109/EDTM50988.2021.9420876

Cite this

Raza Ansari, M. H., Kim, D., Cho, S., Lee, J. H., & Park, B. G. (2021). Core-Shell Dual-Gate Nanowire Synaptic Transistor with Short/Long-Term Plasticity. In 2021 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021 Article 9420876 (2021 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDTM50988.2021.9420876

Raza Ansari, Md Hasan ; Kim, Daehwan ; Cho, Seongjae et al. / Core-Shell Dual-Gate Nanowire Synaptic Transistor with Short/Long-Term Plasticity. 2021 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021. Institute of Electrical and Electronics Engineers Inc., 2021. (2021 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021).

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abstract = "This work demonstrates design and performances of core-shell dual-gate nanowire synaptic transistor with short/long term plasticity. The novel structure helps equip better capacitive coupling between dual gates through full depletion of carriers from the Si channel and construct deeper potential well for charge storage, which eventually increases the probability for short-term-to-long-term memory transition by reducing the recombination. The dual-gate operation effectively realizes the short-and the long-term potentiation in the proposed device for hardware-driven neuromorphic system.",

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author = "{Raza Ansari}, {Md Hasan} and Daehwan Kim and Seongjae Cho and Lee, {Jong Ho} and Park, {Byung Gook}",

note = "Funding Information: Acknowledgments This work was supported in part by Nano · Material Technology Development Program through the National Research Foundation (NRF) funded by the Ministry of Science and ICT (MSIT) under Grant NRF-2016M3A7B4910348, and in part by Institute of Information and Communications Technology Planning and Evaluation (IITP) grant funded by MSIT under Grant 2020-0-01294-001. Publisher Copyright: {\textcopyright} 2021 IEEE.; 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021 ; Conference date: 08-04-2021 Through 11-04-2021",

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Raza Ansari, MH, Kim, D, Cho, S, Lee, JH & Park, BG 2021, Core-Shell Dual-Gate Nanowire Synaptic Transistor with Short/Long-Term Plasticity. in 2021 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021., 9420876, 2021 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021, Institute of Electrical and Electronics Engineers Inc., 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021, Chengdu, China, 8/04/21. https://doi.org/10.1109/EDTM50988.2021.9420876

Core-Shell Dual-Gate Nanowire Synaptic Transistor with Short/Long-Term Plasticity. / Raza Ansari, Md Hasan; Kim, Daehwan; Cho, Seongjae et al.
2021 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021. Institute of Electrical and Electronics Engineers Inc., 2021. 9420876 (2021 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - This work demonstrates design and performances of core-shell dual-gate nanowire synaptic transistor with short/long term plasticity. The novel structure helps equip better capacitive coupling between dual gates through full depletion of carriers from the Si channel and construct deeper potential well for charge storage, which eventually increases the probability for short-term-to-long-term memory transition by reducing the recombination. The dual-gate operation effectively realizes the short-and the long-term potentiation in the proposed device for hardware-driven neuromorphic system.

AB - This work demonstrates design and performances of core-shell dual-gate nanowire synaptic transistor with short/long term plasticity. The novel structure helps equip better capacitive coupling between dual gates through full depletion of carriers from the Si channel and construct deeper potential well for charge storage, which eventually increases the probability for short-term-to-long-term memory transition by reducing the recombination. The dual-gate operation effectively realizes the short-and the long-term potentiation in the proposed device for hardware-driven neuromorphic system.

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Raza Ansari MH, Kim D, Cho S, Lee JH, Park BG. Core-Shell Dual-Gate Nanowire Synaptic Transistor with Short/Long-Term Plasticity. In 2021 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021. Institute of Electrical and Electronics Engineers Inc. 2021. 9420876. (2021 5th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2021). doi: 10.1109/EDTM50988.2021.9420876

Core-Shell Dual-Gate Nanowire Synaptic Transistor with Short/Long-Term Plasticity

Abstract

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Bibliographical note

Keywords

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