Controllable Threshold Voltage in Organic Complementary Logic Circuits with an Electron-Trapping Polymer and Photoactive Gate Dielectric Layer

Toan Thanh Dao, Heisuke Sakai, Hai Thanh Nguyen, Kei Ohkubo, Shunichi Fukuzumi, Hideyuki Murata

Research output: Contribution to journalArticlepeer-review

11 Scopus citations

Abstract

We present controllable and reliable complementary organic transistor circuits on a PET substrate using a photoactive dielectric layer of 6-[4′-(N,N-diphenylamino)phenyl]-3-ethoxycarbonylcoumarin (DPA-CM) doped into poly(methyl methacrylate) (PMMA) and an electron-trapping layer of poly(perfluoroalkenyl vinyl ether) (Cytop). Cu was used for a source/drain electrode in both the p-channel and n-channel transistors. The threshold voltage of the transistors and the inverting voltage of the circuits were reversibly controlled over a wide range under a program voltage of less than 10 V and under UV light irradiation. At a program voltage of -2 V, the inverting voltage of the circuits was tuned to be at nearly half of the supply voltage of the circuit. Consequently, an excellent balance between the high and low noise margins (NM) was produced (64% of NMH and 68% of NML), resulting in maximum noise immunity. Furthermore, the programmed circuits showed high stability, such as a retention time of over 105 s for the inverter switching voltage. Our findings bring about a flexible, simple way to obtain robust, high-performance organic circuits using a controllable complementary transistor inverter.

Original languageEnglish
Pages (from-to)18249-18255
Number of pages7
JournalACS Applied Materials and Interfaces
Volume8
Issue number28
DOIs
StatePublished - 20 Jul 2016

Bibliographical note

Publisher Copyright:
© 2016 American Chemical Society.

Keywords

  • CMOS
  • controllable threshold voltage
  • long retention time
  • low program voltage
  • organic complementary circuit
  • organic field-effect transistors

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