CLOCK-DWF: A write-history-aware page replacement algorithm for hybrid PCM and DRAM memory architectures

Soyoon Lee, Hyokyung Bahn, Sam H. Noh

Research output: Contribution to journalArticlepeer-review

111 Scopus citations

Abstract

Phase change memory (PCM) has emerged as one of the most promising technologies to incorporate into the memory hierarchy of future computer systems. However, PCM has two critical weaknesses to substitute DRAM memory in its entirety. First, the number of write operations allowed to each PCM cell is limited. Second, write access time of PCM is about 6-10 times slower than that of DRAM. To cope with this situation, hybrid memory architectures that use a small amount of DRAM together with PCM have been suggested. In this paper, we present a new memory management technique for hybrid PCM and DRAM memory architecture that efficiently hides the slow write performance of PCM. Specifically, we aim to estimate future write references accurately and then absorb frequent memory writes into DRAM. To do this, we analyze the characteristics of memory write references and find two noticeable phenomena. First, using write history alone performs better than using both read and write history in estimating future write references. Second, the frequency characteristic is a better estimator than temporal locality in predicting future memory writes. Based on these two observations, we present a new page replacement algorithm called CLOCK-DWF (CLOCK with Dirty bits and Write Frequency) that significantly reduces the number of write operations that occur on PCM and also increases the lifespan of PCM memory.

Original languageEnglish
Article number6509382
Pages (from-to)2187-2200
Number of pages14
JournalIEEE Transactions on Computers
Volume63
Issue number9
DOIs
StatePublished - 1 Sep 2014

Keywords

  • CLOCK algorithm
  • Hybrid memory
  • PCM
  • Page replacement
  • Write references

Fingerprint

Dive into the research topics of 'CLOCK-DWF: A write-history-aware page replacement algorithm for hybrid PCM and DRAM memory architectures'. Together they form a unique fingerprint.

Cite this