Circuits for high-speed links and clock generators

Research output: Contribution to journal › Editorial

Original language	English
Pages (from-to)	148
Number of pages	1
Journal	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume	48
State	Published - 2005
Event	2005 IEEE International Solid-State Circuits Conference, ISSCC - San Francisco, CA, United States Duration: 6 Feb 2005 → 10 Feb 2005

Cite this

@article{706d74c322ab4e57b7d39ecf12fd4fd8,

title = "Circuits for high-speed links and clock generators",

author = "Hirotaka Tamura and Park, {Sung Min}",

year = "2005",

language = "English",

volume = "48",

pages = "148",

journal = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

issn = "0193-6530",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2005 IEEE International Solid-State Circuits Conference, ISSCC ; Conference date: 06-02-2005 Through 10-02-2005",

}

TY - JOUR

T1 - Circuits for high-speed links and clock generators

AU - Tamura, Hirotaka

AU - Park, Sung Min

PY - 2005

Y1 - 2005

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M3 - Editorial

AN - SCOPUS:28144446806

SN - 0193-6530

VL - 48

SP - 148

JO - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

JF - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

T2 - 2005 IEEE International Solid-State Circuits Conference, ISSCC

Y2 - 6 February 2005 through 10 February 2005

ER -