Challenges in memory subsystem design for future smartphone systems

Due to the explosive increase in smartphone applications and their memory demand, design of an efficient memory subsystem in smartphones is becoming increasingly important. Meanwhile, PCM (Phase Change Memory) has advanced rapidly as a new memory/storage medium of smartphones. In this paper, we explore the efficiency of traditional memory management subsystems under PCM-based smartphone architectures and discuss how these systems can be managed efficiently. Specifically, we observe that a conventional memory page size of 4KB does not perform well under smartphones and shrink it down to 256B performs even better. Second, we show that prefetching is not effective where the access time of PCM is very small. Third, we present a new memory page replacement policy that reduces the write traffic to PCM without performance degradations. Specifically, our policy monitors the current load of memory systems, and defers the eviction of modified pages from memory appropriately without degrading the system performances. By adopting overall findings and policies, we reduce the energy consumption of smartphone memory significantly and also reduce the write traffic to PCM by 86%. We expect that our result will lead to future smartphone architectures with emerging PCM storage.