TY - GEN
T1 - Binary search in a balanced tree for IP address lookup
AU - Lim, Hyesook
AU - Kim, Wonjung
AU - Lee, Bomi
PY - 2005
Y1 - 2005
N2 - IP address lookup provides forwarding decision based on incoming packet's destination address. Due to the rapid growth of the Internet traffic, IP address lookup became a bottleneck in the Internet routers since it should be performed in wire-speed on packet-by-packet basis. It has been required efficient algorithms and architectures for IP address lookup in terms of lookup performance, memory size requirement, scalability, and update. In this paper, we propose an IP address lookup architecture which shows very good performance in search speed while requires a single small-size memory. In the proposed architecture, using leaf pushing, each of the prefixes becomes disjoint, and the disjoint prefix set constructs a balanced tree that exploits outstanding storage efficiency. The proposed scheme performs binary search on the routing table, in which each of prefixes is stored in ascending order. By confining the binary search space using first 8 bits of prefix, the proposed architecture also improves the search performance greatly. Performance evaluation results show that the proposed scheme requires a single 266.6 KByte SRAM to store about 41000 routing entries, and an address lookup is achieved by 10.4 memory accesses in average.
AB - IP address lookup provides forwarding decision based on incoming packet's destination address. Due to the rapid growth of the Internet traffic, IP address lookup became a bottleneck in the Internet routers since it should be performed in wire-speed on packet-by-packet basis. It has been required efficient algorithms and architectures for IP address lookup in terms of lookup performance, memory size requirement, scalability, and update. In this paper, we propose an IP address lookup architecture which shows very good performance in search speed while requires a single small-size memory. In the proposed architecture, using leaf pushing, each of the prefixes becomes disjoint, and the disjoint prefix set constructs a balanced tree that exploits outstanding storage efficiency. The proposed scheme performs binary search on the routing table, in which each of prefixes is stored in ascending order. By confining the binary search space using first 8 bits of prefix, the proposed architecture also improves the search performance greatly. Performance evaluation results show that the proposed scheme requires a single 266.6 KByte SRAM to store about 41000 routing entries, and an address lookup is achieved by 10.4 memory accesses in average.
KW - Binary Prefix Tree
KW - Binary Search
KW - Disjoint Prefix Tree
KW - Leaf Pushing
KW - Longest Prefix Matching
UR - http://www.scopus.com/inward/record.url?scp=27644539137&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:27644539137
SN - 0780389247
T3 - 2005 Workshop on High Performance Switching and Routing, HPSR 2005
SP - 490
EP - 494
BT - 2005 Workshop on High Performance Switching and Routing, HPSR 2005
T2 - 2005 Workshop on High Performance Switching and Routing, HPSR 2005
Y2 - 12 May 2005 through 14 May 2005
ER -