Arch NAND flash memory array with improved virtual source/drain performance

Wandong Kim; Jung Hoon Lee; Jang Gn Yun; Seongjae Cho; Dong Hua Li; Yoon Kim; Doo Hyun Kim; Gil Sung Lee; Se Hwan Park; Won Bo Shim; Jong Ho Lee; Hyungcheol Shin; Byung Gook Park

doi:10.1109/LED.2010.2074180

Arch NAND flash memory array with improved virtual source/drain performance

Wandong Kim, Jung Hoon Lee, Jang Gn Yun, Seongjae Cho, Dong Hua Li, Yoon Kim, Doo Hyun Kim, Gil Sung Lee, Se Hwan Park, Won Bo Shim, Jong Ho Lee, Hyungcheol Shin, Byung Gook Park

Electronic and Electrical Engineering

Research output: Contribution to journal › Article › peer-review

9 Scopus citations

Abstract

In this letter, a novel SONOS NAND Flash memory array featuring arch-shaped silicon fin and extended word lines (WL) is proposed to improve virtual source/drain (VSD) performance. The arch shape concentrates electric field, resulting in higher electron concentration at the VSD region and higher on -state cell current. In addition, the extended WL process improves the short-channel-effect (SCE) immunity and I-V characteristics. To verify these, an arch VSD NAND array device was fabricated and characterized. The integrated device shows very small SCE while obtaining high on-state cell current. Program and disturbance characteristics of the device are also confirmed.

Original language	English
Article number	5605222
Pages (from-to)	1374-1376
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	31
Issue number	12
DOIs	https://doi.org/10.1109/LED.2010.2074180
State	Published - Dec 2010

Bibliographical note

Funding Information:
Manuscript received August 9, 2010; revised August 26, 2010; accepted August 30, 2010. Date of publication October 18, 2010; date of current version November 24, 2010. This work was supported in part by Samsung Electronics Corporation and in part by the Inter-University Semiconductor Research Center, Seoul National University. The review of this letter was arranged by Editor T. Wang.

Keywords

Extended word line (WL)
Flash memory
field concentration effect
virtual source/drain (VSD)

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10.1109/LED.2010.2074180

Cite this

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title = "Arch NAND flash memory array with improved virtual source/drain performance",

abstract = "In this letter, a novel SONOS NAND Flash memory array featuring arch-shaped silicon fin and extended word lines (WL) is proposed to improve virtual source/drain (VSD) performance. The arch shape concentrates electric field, resulting in higher electron concentration at the VSD region and higher on -state cell current. In addition, the extended WL process improves the short-channel-effect (SCE) immunity and I-V characteristics. To verify these, an arch VSD NAND array device was fabricated and characterized. The integrated device shows very small SCE while obtaining high on-state cell current. Program and disturbance characteristics of the device are also confirmed.",

keywords = "Extended word line (WL), Flash memory, field concentration effect, virtual source/drain (VSD)",

author = "Wandong Kim and Lee, {Jung Hoon} and Yun, {Jang Gn} and Seongjae Cho and Li, {Dong Hua} and Yoon Kim and Kim, {Doo Hyun} and Lee, {Gil Sung} and Park, {Se Hwan} and Shim, {Won Bo} and Lee, {Jong Ho} and Hyungcheol Shin and Park, {Byung Gook}",

note = "Funding Information: Manuscript received August 9, 2010; revised August 26, 2010; accepted August 30, 2010. Date of publication October 18, 2010; date of current version November 24, 2010. This work was supported in part by Samsung Electronics Corporation and in part by the Inter-University Semiconductor Research Center, Seoul National University. The review of this letter was arranged by Editor T. Wang.",

year = "2010",

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doi = "10.1109/LED.2010.2074180",

language = "English",

volume = "31",

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publisher = "Institute of Electrical and Electronics Engineers Inc.",

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T1 - Arch NAND flash memory array with improved virtual source/drain performance

AU - Kim, Wandong

AU - Lee, Jung Hoon

AU - Yun, Jang Gn

AU - Cho, Seongjae

AU - Li, Dong Hua

AU - Kim, Yoon

AU - Kim, Doo Hyun

AU - Lee, Gil Sung

AU - Park, Se Hwan

AU - Shim, Won Bo

AU - Lee, Jong Ho

AU - Shin, Hyungcheol

AU - Park, Byung Gook

N1 - Funding Information: Manuscript received August 9, 2010; revised August 26, 2010; accepted August 30, 2010. Date of publication October 18, 2010; date of current version November 24, 2010. This work was supported in part by Samsung Electronics Corporation and in part by the Inter-University Semiconductor Research Center, Seoul National University. The review of this letter was arranged by Editor T. Wang.

PY - 2010/12

Y1 - 2010/12

N2 - In this letter, a novel SONOS NAND Flash memory array featuring arch-shaped silicon fin and extended word lines (WL) is proposed to improve virtual source/drain (VSD) performance. The arch shape concentrates electric field, resulting in higher electron concentration at the VSD region and higher on -state cell current. In addition, the extended WL process improves the short-channel-effect (SCE) immunity and I-V characteristics. To verify these, an arch VSD NAND array device was fabricated and characterized. The integrated device shows very small SCE while obtaining high on-state cell current. Program and disturbance characteristics of the device are also confirmed.

AB - In this letter, a novel SONOS NAND Flash memory array featuring arch-shaped silicon fin and extended word lines (WL) is proposed to improve virtual source/drain (VSD) performance. The arch shape concentrates electric field, resulting in higher electron concentration at the VSD region and higher on -state cell current. In addition, the extended WL process improves the short-channel-effect (SCE) immunity and I-V characteristics. To verify these, an arch VSD NAND array device was fabricated and characterized. The integrated device shows very small SCE while obtaining high on-state cell current. Program and disturbance characteristics of the device are also confirmed.

KW - Extended word line (WL)

KW - Flash memory

KW - field concentration effect

KW - virtual source/drain (VSD)

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DO - 10.1109/LED.2010.2074180

M3 - Article

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VL - 31

SP - 1374

EP - 1376

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

IS - 12

M1 - 5605222

ER -

Arch NAND flash memory array with improved virtual source/drain performance

Abstract

Bibliographical note

Keywords

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