Abstract
In this paper, we analyze the data access characteristics of deep learning workloads and observe that they differ significantly from traditional workloads. In memory access, access types (instruction vs. data), operations (read vs. write), access bias, and access distributions show unique patterns. In file access, a large volume of data are randomly accessed and their access bias is very weak. For this reason, it is difficult to efficiently manage memory and file data in deep learning workloads. Also, a large volume of data accessed during the training phase of deep learning can lead to severe memory thrashing. To cope with this situation, we present a new memory architecture that makes use of persistent memory to accelerate deep learning memory systems. By considering the access characteristics of deep learning, our experiments show that the proposed architecture with our preliminary management policy improves memory performance by 80% compared to the second-chance algorithm under the same persistent memory based architecture and 98% compared to an original memory architecture without persistent memory.
Original language | English |
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Title of host publication | 2023 3rd International Conference on Electronic Information Engineering and Computer Science, EIECS 2023 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 546-551 |
Number of pages | 6 |
ISBN (Electronic) | 9798350316674 |
DOIs | |
State | Published - 2023 |
Event | 3rd International Conference on Electronic Information Engineering and Computer Science, EIECS 2023 - Hybrid, Changchun, China Duration: 22 Sep 2023 → 24 Sep 2023 |
Publication series
Name | 2023 3rd International Conference on Electronic Information Engineering and Computer Science, EIECS 2023 |
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Conference
Conference | 3rd International Conference on Electronic Information Engineering and Computer Science, EIECS 2023 |
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Country/Territory | China |
City | Hybrid, Changchun |
Period | 22/09/23 → 24/09/23 |
Bibliographical note
Publisher Copyright:© 2023 IEEE.
Keywords
- data access
- deep learning
- memory architecture
- memory thrashing
- training phase