An anomalous device degradation of SOI narrow width devices caused by STI edge influence

Hyeokjae Lee, Jong Ho Lee, Hyungsoon Shin, Young June Park, Hong Shick Min

Research output: Contribution to journalArticlepeer-review

25 Scopus citations


The effects of shallow trench isolation (STI) on silicon-on-insulator (SOI) devices are investigated for various device sizes with three different gate shapes. Both NMOSFETs and PMOSFETs with the channel region butted to the STI show the reduction of mobility (NMOSFETs and PMOSFETs) and the increase of low-frequency noise as the channel width is reduced. In comparison, the devices without the STI-butted channel region show much less variation in mobility for various channel width. The degradation of MOSFETs' yield in SOI MOSFETs with the STI is found to be dependent on the device width since the contribution of the interface roughness (or damage) between the STI and the channel formed during the dry etch process becomes significant with the decrease of channel width and the increase of channel length. From the charge-pumping results, the interface state (Nit) generated by the STI process was identified as the cause of the anomalous degradation.

Original languageEnglish
Pages (from-to)605-612
Number of pages8
JournalIEEE Transactions on Electron Devices
Issue number4
StatePublished - Apr 2002


  • Analog
  • Bulk silicon
  • Charge-pumping method
  • Degradation
  • Interface state
  • Matching
  • Mobility
  • Narrow width
  • Noise
  • Partially depleted
  • Radio frequency (RF)
  • Shallow trench isolation (STI)
  • Silicon-on-insulator (SOI)
  • Stress


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