An essential and important method for physical and electrical characterization of a metal-oxide-semiconductor (MOS) structure is the capacitance-voltage (C-V) measurement. Judging from the C-V characteristics of a MOS structure, we are allowed to predict the DC and AC behaviors of the field-effect transistor and extract a set of primary parameters. The MOS field-effect transistor (MOSFET) technology has evolved to enhance the gate controllability over the channel in order for effectively suppressing the short-channel effects (SCEs) unwantedly taking place as device scaling progresses. For the goal, numerous novel structures have been suggested for the advanced MOSFET devices. However, the C-V characteristics of such novel MOS structures have not been seldom studied in depth. In this work, we report the C-V characteristics of ultra-thin-body (UTB) MOSFETs on the bulk Si and silicon-on-insulator (SOI) substrates by rigorous technology computer-aided design (TCAD) simulation. For higher credibility and accuracy, quantum-mechanical models are activated and empirical material parameters are employed from the existing literature. The MOSFET structure and the material configurations are schemed referring advanced logic technology suggested by the most recent technology roadmap. The C-V characteristics of UTB MOSFETs having a floating body with extremely small volume are closely investigated.
- Capacitance-voltage (C-V) characteristics
- Device physics
- Floating-body MOSFET
- Metal-oxide-semiconductor (MOS) capacitor
- Silicon-on-insulator (SOI)
- Ultra-thin body (UTB)