Abstract
Recent advancements in brain-computer interface (BCI) technology for steady-state visual evoked potential (SSVEP)-based target identification have shifted from traditional linear algebra (LA) techniques to more sophisticated neural network (NN) approaches, driven by their increased accuracy and consistent performance across different subjects. However, adopting NN-based algorithms has introduced complexities in wearable BCI systems, mainly due to their extensive parameter sets that demand significant memory capacity. Moreover, the computational intensity of these models requires reevaluating hardware architectures. Additionally, the advent of Transformer-based models has further advanced the state of the art, providing even higher accuracy and reduced variability in cross-subject performance, placing greater demands on hardware resources. This paper provides an overview of recent algorithmic progress in SSVEP-based target identification. Also, it proposes considerations for the hardware architecture needed to efficiently support the computation of cutting-edge Transformer-based models in wearable BCIs from the perspective of algorithm-hardware co-design.
Original language | English |
---|---|
Title of host publication | ISCAS 2024 - IEEE International Symposium on Circuits and Systems |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9798350330991 |
DOIs | |
State | Published - 2024 |
Event | 2024 IEEE International Symposium on Circuits and Systems, ISCAS 2024 - Singapore, Singapore Duration: 19 May 2024 → 22 May 2024 |
Publication series
Name | Proceedings - IEEE International Symposium on Circuits and Systems |
---|---|
ISSN (Print) | 0271-4310 |
Conference
Conference | 2024 IEEE International Symposium on Circuits and Systems, ISCAS 2024 |
---|---|
Country/Territory | Singapore |
City | Singapore |
Period | 19/05/24 → 22/05/24 |
Bibliographical note
Publisher Copyright:© 2024 IEEE.
Keywords
- Brain-computer interface (BCI)
- algorithm-hardware co-design
- domain-specific architecture
- neural network
- transformer